Jakub Krauz
f6a140a662
arm32 codegen
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This commit adds arm32 code generation for some IR insts.
Floating-point instructions are not supported, because regalloc
does not allow to represent overlapping register classes,
which are needed by VFP/Neon.
There is also no support for big-endianness, I64 and I128 types.
2020-09-22 12:49:42 +02:00
Benjamin Bouvier
beca77c2f8
Regalloc: rename "constraint" to "rc" and "op" to "constraint";
2019-10-17 08:42:08 -07:00
Benjamin Bouvier
f668869508
Share constants between codegen and the meta crate;
2019-10-10 16:45:48 +02:00
bjorn3
bb8fa40ef0
Rustfmt
2019-10-02 11:50:44 -07:00
bjorn3
10e226f9ff
Always use extern crate std in cranelift-codegen
2019-10-02 11:50:44 -07:00
Benjamin Bouvier
d7d48d5cc6
Add the dyn keyword before trait objects;
2019-06-24 11:42:26 +02:00
Benjamin Bouvier
a45b814de8
Fixes #13 : Enable conditional compilation of ISAs through features;
2019-02-12 08:19:57 -08:00
lazypassion
747ad3c4c5
moved crates in lib/ to src/, renamed crates, modified some files' text ( #660 )
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moved crates in lib/ to src/, renamed crates, modified some files' text (#660 )
2019-01-28 15:56:54 -08:00