Commit Graph

115 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
950838c489 Add a regmove instruction.
This will be used to locally change the register locations of values in
order to satisfy instruction constraints.
2017-05-02 11:32:12 -07:00
Jakob Stoklund Olesen
0cb36c9031 Remove the return_reg instruction.
RISC architectures that take a return address in a register can use a
special-purpose `link` return value to do so.
2017-04-19 16:08:16 -07:00
Jakob Stoklund Olesen
d424589daa Allow for special purpose function arguments and return values.
Enumerate a set of special purposes for function arguments that general
purpose code needs to know about. Some of these argument purposes will
only appear in the signature of the current function, representing
things the prologue and epilogues need to know about like the link
register and callee-saved registers.

Get rid of the 'inreg' argument flag. Arguments can be pre-assigned to a
specific register instead.
2017-04-17 15:06:30 -07:00
Jakob Stoklund Olesen
b4ac520332 Extending loads and truncating stores 2017-04-11 10:30:03 -07:00
Jakob Stoklund Olesen
aad6ebebb5 Add load and store instructions.
Define a MemFlags class, currently holding a notrap and aligned flag.
2017-04-11 09:54:55 -07:00
Jakob Stoklund Olesen
0c3771bccb Ensure that the docs examples verify as Cretonne IL.
Any *.cton files in the docs directory are now included when running the
test-all.sh script. This is to ensure that the examples are in fact
correct IL.

Always print NaN and Inf floats with a sign. Print the positive ones as
+NaN and +Inf to make them easier to parse.
2017-04-10 15:28:24 -07:00
Jakob Stoklund Olesen
b474485c0d Add heap_load, heap_store, and heap_addr instructions.
These are used when lowering WebAssembly sandbox code.
2017-04-10 15:04:33 -07:00
Jakob Stoklund Olesen
222ae8af22 Define stack_load, stack_store, and stack_addr instructions. 2017-04-10 13:56:57 -07:00
Jakob Stoklund Olesen
eccc2d0dae Add an Offset32 immediate operand kind.
This will be used to represent an immediate 32-bit signed address offset
for load/store instructions.
2017-04-10 11:53:46 -07:00
Jakob Stoklund Olesen
fa4f151b9b Add a fallthrough instruction.
Change jumps to fallthroughs in the branch relaxation pass before
computing the EBB offsets.
2017-04-06 14:22:32 -07:00
Jakob Stoklund Olesen
1b6a6f4e48 Add the br_icmp instruction.
This instruction behaves like icmp fused with brnz, and it can be used
to represent fused compare+branch instruction on Intel when optimizing
for macro-op fusion.

RISC-V provides compare-and-branch instructions directly, and it is
needed there too.
2017-04-03 15:04:42 -07:00
Jakob Stoklund Olesen
e23d12bbc7 Add an icmp_imm instruction.
Compare a scalar integer to an immediate constant. Both Intel and RISC-V
ISAs have this operation.

This requires the addition of a new IntCompareImm instruction format.
2017-04-03 09:49:44 -07:00
Jakob Stoklund Olesen
2a321f42fb Strip the _lohi suffix from the isplit instructions.
For symmetry with the vector splitting instructions, we now have:

    isplit iconcat
    vsplit vconcat

No functional change.
2017-03-21 13:22:50 -07:00
Angus Holder
11a0daa7fd Define boolean conversion instructions. 2017-03-11 10:25:55 -08:00
Jakob Stoklund Olesen
9fbfd0d2a6 Remove the vconst instruction and the UnaryImmVector format.
No instruction sets actually have single instructions for materializing
vector constants. You always need to use a constant pool.

Cretonne doesn't have constant pools yet, but it will in the future, and
that is how vector constants should be represented.
2017-03-10 11:57:49 -08:00
Jakob Stoklund Olesen
c50e5f3f66 Separate immediate and value operands in the instruction format.
Instruction formats are now identified by a signature that doesn't
include the ordering of value operands relative to immediate operands.

This means that the BinaryRev instruction format becomes redundant, so
delete it. The isub_imm instruction was the only one using that format.
Rename it to irsub_imm to make it clear what it does now that it is
printed as 'irsub_imm v2, 45'.
2017-03-10 11:20:39 -08:00
Jakob Stoklund Olesen
fd58b7cc29 Add vsplit and vconcat instructions.
Add support for two new type variable functions: half_vector() and
double_vector().

Use these two instructions to break down unsupported SIMD types and
build them up again.
2017-03-07 14:31:57 -08:00
Jakob Stoklund Olesen
cf5701b137 Add ABI annotations to function signatures.
Specify the location of arguments as well as the size of stack argument
array needed. The ABI annotations are optional, just like the value
locations.

Remove the Eq implementation for Signature which was only used by a
single parser test.
2017-02-24 13:53:46 -08:00
Jakob Stoklund Olesen
aa7e349134 Add a section about implementation limits.
Fix a few other minor issues with the documentation.
2017-02-24 11:08:15 -08:00
Jakob Stoklund Olesen
b6fa40d6a3 Add a return_reg instruction to the base instruction set.
Register-style return is used by all RISC architectures, so it is
natural to have a shared instruction representation.
2017-02-21 13:05:17 -08:00
Andrea Canciani
fd3cd153ed Fix some typos in the documentation
These were found by the spellchecker.
2017-01-27 09:51:22 -08:00
ranma42
f67a1a60cb Fix some typos in the Language Reference 2016-11-15 08:13:08 -08:00
Jakob Stoklund Olesen
0b9b956695 Split out instruction definitions.
- cdsl.instructions defines the Instruction class.
- base.instructions defines the base instruction set.
2016-11-08 12:33:50 -08:00
Jakob Stoklund Olesen
a5675b6138 Add glossary entries for IL and IR. 2016-11-02 09:58:02 -07:00
Benjamin Bouvier
419e686581 Fix a few typos in the docs; 2016-10-28 11:31:22 -07:00
Jakob Stoklund Olesen
baf9195080 Add a document comparing Cretonne and LLVM. 2016-10-27 13:41:39 -07:00
Jakob Stoklund Olesen
0acabc80d0 Define live range splitting instructions.
The copy/spill/fill instructions will be used by the register allocator
for splitting live ranges. The copy instruction is also useful when
rewriting values:

If a primary value is rewritten as a secondary result, a copy
instruction can be used instead:

  a = foo x
=>
  t, vx1 = call ...
  a = copy vx1

Since a primary value must be the first value of an instruction, this
doesn't work:

  a = foo x
=>
  t, a = call ...
2016-10-20 15:34:16 -07:00
Jakob Stoklund Olesen
bdc95990d4 Add call and call_indirect instructions.
Add a new IndirectCall instruction format which has a value callee as
well as the call arguments.

Define call and call_indirect instructions.
2016-10-18 10:04:06 -07:00
Jakob Stoklund Olesen
e35811e120 Add FuncRef and SigRef entity references.
These refer to external functions and function signatures declared in
the preamble. Since we're already using the type names 'Signature' and
'Function', these entity references don't folow the usual EntityData /
Entity naming convention.
2016-10-12 15:20:46 -07:00
Jakob Stoklund Olesen
4db11d1ae7 Add legalization helper instructions.
The isplit_lohi instruction breaks an integer into two halves. This will
typically be used to get the two halves of an `i64` value on 32-bit
CPUs.

The iconcat_lohi is the reverse operation. It reconstructs the `i64`
from the low and high bits.
2016-09-27 16:22:32 -07:00
Jakob Stoklund Olesen
6f243ab35d Add documentation links to all existing instructions. 2016-09-23 16:53:48 -07:00
Jakob Stoklund Olesen
6d3883cf78 Add an autoinstgroup Sphinx directive.
This directive documents an instruction group and lists all instructions
contained in the group, whether they have been documented or not.
2016-09-23 16:53:47 -07:00
Jakob Stoklund Olesen
acf41a7c09 Add a Cretonne testing guide.
Describe the basics of Rust-level tests, and go into more detail about
the file-level tests.
2016-09-23 11:37:40 -07:00
Jakob Stoklund Olesen
8296e92ddc Move entry_block() into Layout.
The single entry block in a function is simply the first block in the layout.

Remove the 'entry' keyword from the textual IL, the lexer and parser.
2016-07-22 10:06:51 -07:00
Jakob Stoklund Olesen
8cb198b23c Delete the concept of 'local SSA form'.
This was supposed to make verification fast, but WebAssembly is no longer in
this form since it's blocks can produce values.

Also, computing a flow graph and dominator tree is really fast anyway.
2016-07-08 16:26:11 -07:00
Jakob Stoklund Olesen
3839281414 Define a return instruction.
It is possible to return multiple values from a function, so ReturnData contains
a VariableArgs instance.

We don't want return instructions to appear as 'return (v1)', so tweak the
printing of VariableArgs so the parantheses are added externally.
2016-07-08 16:19:26 -07:00
Jakob Stoklund Olesen
b710dd8464 Define floating point conversion instructions. 2016-07-08 11:20:19 -07:00
Jakob Stoklund Olesen
62e96f4d3e Metadefs for integer reduce and extend operations.
Naming is interesting here. Since 'truncate' refers to removing the least
significant digits, use 'ireduce' instead. The 'extend' use is fairly
established. Don't abbreviate, avoid unfortunate modern vernacular.
2016-07-07 18:17:16 -07:00
Jakob Stoklund Olesen
c82b772315 Add meta definition for bitcast.
This instruction uses two type variables: input and output. Make sure that our
parser can handle it. The output type variable annotation is mandatory.

Add a ValueTypeSet::example() method which is used to provide better diagnostics
for a missing type variable.
2016-07-07 14:01:00 -07:00
Jakob Stoklund Olesen
81ca406dd0 Add meta definitions for floating point operations.
Rename the Select instruction format to Ternary since it is also used by the fma
instruction.
2016-07-07 13:16:24 -07:00
Jakob Stoklund Olesen
5d8fb0fdc3 Define icmp and fcmp comparison instructions.
Add new intcc and floatcc operand types for the immediate condition codes on
these instructions.

Add new IntCompare and FloatCompare instruction formats.

Add a generic match_enum() parser function that can match any identifier-like
enumerated operand kind that implements FromStr.

Define the icmp and fcmp instructions in case.py. Include documentation for the
condition codes with these two instructions.
2016-07-07 11:43:12 -07:00
Jakob Stoklund Olesen
96cfb40507 Add vector instructions.
Use derived type variables with the 'LaneOf' function.

Add u8 immediates to be used for lane indexes and bit shifts.
2016-05-20 15:36:03 -07:00
Jakob Stoklund Olesen
cc71744b74 Implement select and vselect instructions.
This gives us the opportunity to use the AsBool derived type variables and a
Select instruction format with a non-default typevar_operand setting.
2016-05-20 15:11:17 -07:00
Jakob Stoklund Olesen
b06f5ef72f Define control flow instructions.
Rename 'br' to 'jump'. We'll use jump/br to mean unconditional/conditional
control transfer respectively.
2016-05-19 09:01:40 -07:00
Jakob Stoklund Olesen
27a311701d Add entity references as a new operand kind.
Define known entities in the cretonne.entities module.
2016-05-18 15:31:02 -07:00
Jakob Stoklund Olesen
716b427cb1 Add top-level productions to language reference. 2016-04-28 14:39:42 -07:00
Jakob Stoklund Olesen
615d9825e5 Simplify parser.
Use 'if let' instead of 'match' where it makes sense.

Use EBNF notation for the grammar rules. This simplifies repetition a lot.
2016-04-28 08:06:30 -07:00
Jakob Stoklund Olesen
f72f47aece Replace bool with b1, b8, b16, ...
The b1 type is an abstract boolean value. The others are concrete
representations.
2016-04-05 10:45:00 -07:00
Jakob Stoklund Olesen
4b265c2ee3 Display quiet NaNs as 'NaN'.
This is recommended by IEEE 754-2008.

We still distinguish signaling NaNs with 'sNaN'.
2016-04-05 10:27:18 -07:00
Jakob Stoklund Olesen
524eb77185 Implement IEEE immediates for binary32 and binary64.
Clarify the textual encoding of floating point numbers.

Don't allow decimal floating point since conversion to/from binary can produce
rounding problems on some (buggy) systems.
2016-04-01 14:40:15 -07:00