Jakob Stoklund Olesen
24c97ce6e5
Verify that type variables have been fully bound.
...
The shift instructions have two type variables since the shift amount can be a
differently sized integer. Fix the RISC-V shift encodings to reflect this, and
allow i64 registers to be shifted by an i32 amount.
2016-08-04 10:21:48 -07:00
Jakob Stoklund Olesen
c1d32167dc
Use dot syntax to bind type variables on instructions.
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Encodings need to refer to concrete instances of polymorphic instructions by
binding type variables. Allow dot syntax like iadd.i32 to do that.
2016-08-03 16:30:47 -07:00
Jakob Stoklund Olesen
9cdf6edd62
Add an Encoding meta-language class.
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Start adding some RISC-V encodings too as a way of testing the ergonomics.
2016-08-03 16:04:29 -07:00
Jakob Stoklund Olesen
c4faef196e
Add a CPUMode meta-language class.
2016-08-03 11:20:13 -07:00
Jakob Stoklund Olesen
f1e2dffa81
PEP8 formatting.
2016-05-12 13:37:03 -07:00
Jakob Stoklund Olesen
7bf4570ba1
Add a RISC-V target.
...
Flesh out the directory structure for defining target instruction set
architectures. Use RISC-V as a startgin point because it is so simple.
2016-04-06 12:00:35 -07:00
