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Author	SHA1	Message	Date
Jakob Stoklund Olesen	4bb0e2014c	Add support for setting presets. Fixes #11. Presets are groups of settings and values applied at once. This is used as a shorthand in test files, so for example "isa intel nehalem" enables all of the CPUID bits that the Nehalem micro-architecture provides.	2017-07-14 13:57:44 -07:00
Jakob Stoklund Olesen	d8e2cb2b42	Add some ISA predicates for Intel CPUID features. Guard the popcnt instruction on the proper CPUID bits.	2017-07-12 16:05:20 -07:00
Jakob Stoklund Olesen	19ac05577c	Fill in boilerplate for Intel and ARM targets. The intel, arm32, and arm32 targets were only defined in the meta language previously. Add Rust implementations too. This is mostly boilerplate, except for the unit tests in the registers.rs files.	2016-11-23 10:42:07 -08:00

Author

SHA1

Message

Date

Jakob Stoklund Olesen

4bb0e2014c

Add support for setting presets.

Fixes #11.

Presets are groups of settings and values applied at once. This is used
as a shorthand in test files, so for example "isa intel nehalem" enables
all of the CPUID bits that the Nehalem micro-architecture provides.

2017-07-14 13:57:44 -07:00

Jakob Stoklund Olesen

d8e2cb2b42

Add some ISA predicates for Intel CPUID features.

Guard the popcnt instruction on the proper CPUID bits.

2017-07-12 16:05:20 -07:00

Jakob Stoklund Olesen

19ac05577c

Fill in boilerplate for Intel and ARM targets.

The intel, arm32, and arm32 targets were only defined in the meta
language previously. Add Rust implementations too.

This is mostly boilerplate, except for the unit tests in the
registers.rs files.

2016-11-23 10:42:07 -08:00

3 Commits