Commit Graph

43 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
91b1566aca Use "test regalloc" for the register allocator tests.
These tests were only using "test compile" because it doesn't require
any filecheck directives to be present, so just stop requiring filecheck
directives for "test regalloc" and other filecheck-based test drivers.
2017-10-25 18:31:14 -07:00
Jakob Stoklund Olesen
d37126565e Also consider fixed outputs for replace_global_defines.
Fixes #178.

When an instruction with a fixed output operand defines a globally live
SSA value, we need to check if the fixed register is available in the
`regs.global` set of registers that can be used across EBB boundaries.

If the fixed output register is not available in regs.global, set the
replace_global_defines flag so the output operands are rewritten as
local values.
2017-10-25 14:28:30 -07:00
Jakob Stoklund Olesen
e8ecf1f809 Add a FixedTied constraint kind for operand constraints.
Fixes #175.

The Intel division instructions have fixed input operands that are
clobbered by fixed output operands, so the value passed as an input will
be clobbered just like a tied operand.

The FixedTied operand constraint is used to indicate a fixed input
operand that has a corresponding output operand with the same fixed
register.

Teach the spiller to teach a FixedTied operand the same as a Tied
operand constraint and make sure that the input value is killed by the
instruction.
2017-10-25 11:22:20 -07:00
Jakob Stoklund Olesen
994af598f5 Avoid interference on CFG edges.
Track allocatable registers both locally and globally: Add a second
AllocatableSet which tracks registers allocated to global values without
accounting for register diversions. Since diversions are only local to
an EBB, global values must be assigned un-diverted locations that don't
interfere.

Handle the third "global" interference domain in the constraint solver in
addition to the existing "input" and "output" domains.

Extend the solver error code to indicate when a global define just can't
be allocated because there are not enough available global registers.
Resolve this problem by replacing the instruction's global defines with
local defines that are copied into their global destinations
afterwards.
2017-10-11 15:38:30 -07:00
Jakob Stoklund Olesen
90ed698e83 Add an unreachable code elimination pass.
The register allocator doesn't even try to compile unreachable EBBs, so
any values defined in such blocks won't be assigned registers.

Since the dominator tree already has determined which EBBs are
reachable, we should just eliminate any unreachable blocks instead o
trying to do something with the dead code.

Not that this is not a "dead code elimination" pass which would also
remove individual instructions whose results are not used.
2017-10-09 15:26:27 -07:00
Jakob Stoklund Olesen
b3fa47cacc Add support for emergency spill slots.
- Create a new kind of stack slot: emergency_slot.
- Add a get_emergency_slot() method which finds a suitable emergency
  slot given a list of slots already in use.
- Use emergency spill slots when schedule_moves needs them.
2017-10-06 10:45:13 -07:00
Jakob Stoklund Olesen
fb0999ce33 Check the top-level register class for available registers.
Fixes #165.

The constraint solver's schedule_move() function sometimes need to use
an extra available register when the moves to be scheduled contains
cycles.

The pending moves have associated register classes that come from the
constraint programming. Since the moves have hard-coded to and from
registers, these register classes are only meant to indicate the
register sizes. In particular, we can use the whole top-level register
class when scavenging for a spare register to break a cycle.
2017-10-03 14:12:18 -07:00
Jakob Stoklund Olesen
c091a695e6 Fix coalescer bug exposed by the gvn-unremovable-phi test.
When we detect interference between the values that have already been
merged into the candidate virtual register and an EBB argument, we first
try to resolve the conflict by splitting. We also check if the existing
interfering value is fundamentally incompatible with the branch
instruction so it needs to be removed from the virtual register,
restarting the merge operation.

However, this existing interfering value is not necessarily the only
interference, so the split is not guaranteed to resolve the conflict. If
it turns out that splitting didn't resolve the conflict, restart the
merge after removing this second conflicting value.
2017-10-03 11:13:46 -07:00
Jakob Stoklund Olesen
5f56f81251 Resolve all value aliases when computing live ranges.
Value aliases are only in the way during register allocation, so make
sure they are all dead as we enter the register allocation passes.
2017-09-29 15:54:06 -07:00
Jakob Stoklund Olesen
c82e68efea Eliminate the ABCD register class constaint in REX encodings.
Some REX-less encodings require an ABCD input because they are looking
at 8-bit registers. This constraint doesn't apply with a REX prefix
where the low 8 bits of all registers are addressable.
2017-09-29 15:29:25 -07:00
Jakob Stoklund Olesen
51a6901a7f Implement coloring::iterate_solution().
It can happen that the currently live registers are blocking a smaller
register class completely, so the only way of solving the allocation
problem is to turn some of the live-through registers into solver
variables.

When the quick_solve attempt fails, try to free up registers in the
critical register class by turning live-through values into solver
variables.
2017-09-29 14:55:35 -07:00
Jakob Stoklund Olesen
45888ab84e Reload for spilled call return values.
When the return value from a call has been spilled, the reload pass
needs to insert a spill instruction right after the call instruction
which returns its results in registers.
2017-09-29 11:25:38 -07:00
Jakob Stoklund Olesen
84471a8431 Add some very basic support for the Intel32 ABI.
In 32-bit mode, all function arguments are passed on the stack, not in
registers.

This ABI support is not complete or properly tested, but at least it
doesn't try to pass arguments in r8.
2017-09-27 12:55:34 -07:00
Jakob Stoklund Olesen
cc3707706c Write and parse value locations for EBB arguments
Fixes #56.

We now have complete support for value location annotations in the
textual IL format. Values defined by instructions as well as EBB
arguments are covered.
2017-09-15 11:21:29 -07:00
Jakob Stoklund Olesen
0deaa616a3 Record identity assignments in regalloc constraint solver.
Fixes #147.

The Solver::reassign_in() method would previously not record fixed
register assignments for values that are already in the correct
register. The register would simply be marked as unavailable for the
solver.

This did have the effect of tripping up the sanity checks in
Solver::add_var() when that method was called with such a "reassigned"
value. The function can be called for a value that already has a fixed
assignment, but the sanity checks want to make sure the variable
constraints are compatible with the existing fixed assignment. When no
such assignment could be found, the method panicked.

To fix this, make sure that even identity reassignments are recorded
in the assignments vector. Instead, filter the identity assignments out
before scheduling a move sequence for the assignments.

Also add some debug tracing to the regalloc solver.
2017-08-29 10:45:33 -07:00
Jakob Stoklund Olesen
c96d4daa20 Add a calling convention to all function signatures.
A CallConv enum on every function signature makes it possible to
generate calls to functions with different calling conventions within
the same ISA / within a single function.

The calling conventions also serve as a way of customizing Cretonne's
behavior when embedded inside a VM. As an example, the SpiderWASM
calling convention is used to compile WebAssembly functions that run
inside the SpiderMonkey virtual machine.

All function signatures must have a calling convention at the end, so
this changes the textual IL syntax.

Before:

    sig1 = signature(i32, f64) -> f64

After

    sig1 = (i32, f64) -> f64 native
    sig2 = (i32) spiderwasm

When printing functions, the signature goes after the return types:

    function %r1() -> i32, f32 spiderwasm {
    ebb1:
        ...
    }

In the parser, this calling convention is optional and defaults to
"native". This is mostly to avoid updating all the existing test cases
under filetests/. When printing a function, the calling convention is
always included, including for "native" functions.
2017-08-03 11:40:24 -07:00
Jakob Stoklund Olesen
924c4649cc Enforce encodings for instructions with side effects.
We allow ghost instructions to exist if they have no side effects.
Instructions that affect control flow or that have other side effects
must be encoded.

Teach the IL verifier to enforce this. Once any instruction has an
encoding, all instructions with side effects must have an encoding.
2017-07-12 09:41:25 -07:00
Jakob Stoklund Olesen
f0abff3611 Handle tied operands that are not killed by their use.
Any tied register uses are interesting enough to be added to the reguses
list if their value is not killed.

A copy needs to be inserted in that case.
2017-07-05 15:48:06 -07:00
Jakob Stoklund Olesen
64f6a98abe Test a tied operand following a fixed register operand.
The redefined tied value lives in the diverted register.
2017-07-05 15:48:06 -07:00
Jakob Stoklund Olesen
b7917fe404 Test two consecutive fixed operands.
We need to move the previous value out of the way first.
2017-07-05 12:21:58 -07:00
Jakob Stoklund Olesen
e7db3f2b3a Add a test with a fixed register constraint.
Make sure we use the diverted register location for tied operands.
2017-07-05 12:08:53 -07:00
Jakob Stoklund Olesen
0d2d1ea8cf Add support for tied operands.
Include a very basic test using an Intel 'sub' instruction. More to
follow.
2017-06-30 13:36:41 -07:00
Jakob Stoklund Olesen
18dc420352 Repair constraint violations during spilling.
The following constraints may need to be resolved during spilling
because the resolution increases register pressure:

- A tied operand whose value is live through the instruction.
- A fixed register constraint for a value used more than once.
- A register use of a spilled value needs to account for the reload
  register.
2017-06-29 16:51:05 -07:00
Jakob Stoklund Olesen
138d3c75c6 Spill live-ins and EBB arguments if there are too many. 2017-06-29 14:07:19 -07:00
Jakob Stoklund Olesen
588ef0ad2f Propagate affinities for EBB arguments.
A priory, an EBB argument value only gets an affinity if it is used
directly by a non-ghost instruction. A use by a branch passing arguments
to an EBB doesn't count.

When an EBB argument value does have an affinity, the values passed by
all the predecessors must also have affinities. This can cause EBB
argument values to get affinities recursively.

- Add a second pass to the liveness computation for propagating EBB
  argument affinities, possibly recursively.
- Verify EBB argument affinities correctly: A value passed to a branch
  must have an affinity only if the corresponding EBB argument value in
  the destination has an affinity.
2017-06-29 10:30:26 -07:00
Jakob Stoklund Olesen
e7a543ea33 Make sure return values are assigned an affinity.
When an EBB argument value is used only as a return value, it still
needs to be given a register affinity. Otherwise it would appear as a
ghost value with no affinity.

Do the same to call arguments.
2017-06-29 09:24:05 -07:00
Jakob Stoklund Olesen
0574dcdeee Don't coalesce incoming stack arguments.
A function parameter in an incoming_arg stack slot should not be
coalesced into any virtual registers. We don't want to force the whole
virtual register to spill to the incoming_arg slot.
2017-06-28 15:37:38 -07:00
Jakob Stoklund Olesen
b2fda76c5f Assign stack slots to incoming function arguments.
Function arguments that don't fit in registers are passed on the stack.

Create "incoming_arg" stack slots representing the stack arguments, and
assign them to the value arguments during spilling.
2017-06-28 15:03:59 -07:00
Jakob Stoklund Olesen
bbdf07a64e Color EBB arguments.
When coloring registers for a branch instruction, also make sure that
the values passed as EBB arguments are in the registers expected by the
EBB.

The first time a branch to an EBB is processed, assign the EBB arguments
to the registers where the branch arguments already reside so no
regmoves are needed.
2017-06-27 16:35:38 -07:00
Jakob Stoklund Olesen
85b624d13b Add a coalescing pass to the register allocator.
Coalescing means creating virtual registers and transforming the code
into conventional SSA form. This means that every value used as a branch
argument will belong to the same virtual register as the corresponding
EBB argument value.

Conventional SSA form makes it easy to avoid memory-memory copies when
spilling values, and the virtual registers can be used as hints when
picking registers too. This reduces the number of register moves needed
for EBB arguments.
2017-06-22 15:03:48 -07:00
Jakob Stoklund Olesen
1dd8d913aa Assign spill slots to spilled values.
As soon as a value is spilled, also assign it to a spill slot.

For now, create a new spill slot for each spilled value. In the future,
values will be sharing spill slots of they are phi-related.
2017-06-16 13:34:18 -07:00
Jakob Stoklund Olesen
db62f435f8 Make register copies for incompatible operands.
An instruction may have fixed operand constraints that make it
impossibly to use a single register value to satisfy two at a time.

Detect when the same value is used for multiple fixed register operands
and insert copies during the spilling pass.
2017-06-15 13:12:13 -07:00
Jakob Stoklund Olesen
454910407f Spill values live across calls.
Calls clobber many registers, so spill everything that is live across a
call for now.

In the future, we may add support for callee-saved registers.
2017-06-14 08:55:01 -07:00
Jakob Stoklund Olesen
0974b4a6e2 Extract spill insertion into a reload::insert_spill function.
Make sure that spill instructions are generated in the same way
everywhere, including adding encoding and updating live ranges.
2017-06-13 15:46:11 -07:00
Jakob Stoklund Olesen
396b998dad Handle ABI arguments correctly in the reload pass.
Values passed as arguments to calls and return instructions may also be
reload candidates.
2017-06-13 15:13:36 -07:00
Jakob Stoklund Olesen
63a372fd80 Basic spilling implementation.
Add a spilling pass which lowers register pressure by assigning SSA
values to the stack. Important missing features:

- Resolve conflicts where an instruction uses the same value more than
  once in incompatible ways.
- Deal with EBB arguments.

Fix bugs in the reload pass exposed by the first test case:

- Create live ranges for temporary registers.
- Set encodings on created spill and fill instructions.
2017-06-13 13:58:20 -07:00
Aleksey Kuznetsov
706eef23d3 Binary function names (#91)
* Function names should start with %

* Create FunctionName from string

* Implement displaying of FunctionName as %nnnn with fallback to #xxxx

* Run rustfmt and fix FunctionName::with_string in parser

* Implement FunctionName::new as a generic function

* Binary function names should start with #

* Implement NameRepr for function name

* Fix examples in docs to reflect that function names start with %

* Rebase and fix filecheck tests
2017-06-10 10:30:37 -07:00
Jakob Stoklund Olesen
c713ea8c57 Add fixed constraints for ABI arguments and return values.
We can start adding some real test cases for the move resolver now.
2017-05-11 12:02:02 -07:00
Jakob Stoklund Olesen
d1390006b1 Always create live ranges for dead EBB arguments.
The live value tracker expects them to be there.

We may eventually delete dead arguments from internal EBBs, but at least
the entry block needs to be able to handle dead function arguments.
2017-05-11 11:42:44 -07:00
Jakob Stoklund Olesen
eaf1ed09fc Color entry block arguments using the function signature.
The arguments to the entry block arrive in registers determined by the
ABI. This information is stored in the signature.

Use a separate function for coloring entry block arguments using the
signature information. We can't handle stack arguments yet.
2017-04-26 14:38:16 -07:00
Jakob Stoklund Olesen
6197bfff72 Add a TargetIsa::allocatable_registers() method.
This gives the target ISA a chance to reserve registers like the stack
pointer or hard-wired 0 registers like %x0 on RISC-V.
2017-04-26 13:54:40 -07:00
Jakob Stoklund Olesen
0cb36c9031 Remove the return_reg instruction.
RISC architectures that take a return address in a register can use a
special-purpose `link` return value to do so.
2017-04-19 16:08:16 -07:00
Jakob Stoklund Olesen
04bddd73ba Add a 'regalloc' filetest command.
Run functions through the register allocator, and then filecheck.
2017-02-22 11:53:01 -08:00