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1fdeddd0d3d350bbae193eb63d19e7aaaefd6ecc
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5 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
1fdeddd0d3 Add Intel encodings for floating point load/store instructions. 
Include wasm/*-memory64.cton tests too.
 2017-09-19 09:32:54 -07:00
Jakob Stoklund Olesen
051aaed43e Add Intel encodings for more conversion instructions. 
The following instructions have simple encodings:

- bitcast.f32.i32
- bitcast.i32.f32
- bitcast.f64.i64
- bitcast.i64.f64
- fpromote.f64.f32
- fdemote.f32.f64

Also add helper functions enc_flt() and enc_i32_i64 to
intel.encodings.py for generating the common set of encodings for an
instruction: I32, I64 w/REX, I64 w/o REX.
 2017-07-27 11:08:41 -07:00
Jakob Stoklund Olesen
35cbe68a70 Intel encodings for floating point bitwise ops. 
band, bor, bxor, band_not are all available on XMM registers.
 2017-07-20 11:45:06 -07:00
Jakob Stoklund Olesen
43e190ad20 Intel encodings for fadd, fsub, fmul, fdiv. 2017-07-20 10:40:11 -07:00
Jakob Stoklund Olesen
e3f6755264 Add some signed int to float conversions. 
These map to single Intel instructions.

The i64 to float conversions are not tested yet. The encoding tables
can't yet differentiate instructions on a secondary type variable alone.
 2017-07-19 15:35:13 -07:00