wasmtime

T0b1/wasmtime

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Author	SHA1	Message	Date
Jakob Stoklund Olesen	1fa3ddf018	Return RegInfo by value from TargetIsa::register_info(). The struct is just a pair of static references, and we don't need the double indirection.	2017-02-14 16:05:54 -08:00
Jakob Stoklund Olesen	2390e3e3f0	Add operand register constraints. Every encoding recipe must specify register constraints on input and output values. Generate recipe constraint tables along with the other encoding tables.	2017-01-25 13:35:18 -08:00
Jakob Stoklund Olesen	fb4db38dd6	Fill in boilerplate for Intel and ARM targets. The intel, arm32, and arm32 targets were only defined in the meta language previously. Add Rust implementations too. This is mostly boilerplate, except for the unit tests in the registers.rs files.	2016-11-23 10:42:07 -08:00

Author

SHA1

Message

Date

Jakob Stoklund Olesen

1fa3ddf018

Return RegInfo by value from TargetIsa::register_info().

The struct is just a pair of static references, and we don't need the
double indirection.

2017-02-14 16:05:54 -08:00

Jakob Stoklund Olesen

2390e3e3f0

Add operand register constraints.

Every encoding recipe must specify register constraints on input and
output values.

Generate recipe constraint tables along with the other encoding tables.

2017-01-25 13:35:18 -08:00

Jakob Stoklund Olesen

fb4db38dd6

Fill in boilerplate for Intel and ARM targets.

The intel, arm32, and arm32 targets were only defined in the meta
language previously. Add Rust implementations too.

This is mostly boilerplate, except for the unit tests in the
registers.rs files.

2016-11-23 10:42:07 -08:00

3 Commits