Commit Graph

961 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
fb227cb389 Move Intel recipe_* bodies into intel/recipes.py.
Use a PUT_OP macro in the TailRecipe Python class to replace the code
snippet that emits the prefixes + opcode part of the instruction encoding.

Prepare for the addition of REX prefixes by giving the PUT_OP functions
a third argument representing the REX prefix. For the non-REX encodings,
verify that no REX bits wold be needed.
2017-07-11 11:05:27 -07:00
d1m0
f837dcf4b7 Handle bound instructions in pattern type inference (#113) 2017-07-11 08:39:22 -07:00
d1m0
fc11ae7b72 Emit runtime type checks in legalizer.rs (#112)
* Emit runtime type checks in legalizer.rs
2017-07-10 15:28:32 -07:00
Jakob Stoklund Olesen
528e6ff3f5 Generate instruction unwrapping code for binemit recipes.
Generate code to:

- Unwrap the instruction and generate an error if the instruction format
  doesn't match the recipe.
- Look up the value locations of register and stack arguments.

The recipe_* functions in the ISA binemit modules now take these
unwrapped items as arguments.

Also add an optional `emit` argument to the EncRecipe constructor which
makes it possible to provide inline Rust code snippets for code
emission. This requires a lot less boilerplate than recipe_* functions.
2017-07-07 15:10:17 -07:00
Jakob Stoklund Olesen
27d272ade0 Add a fmt.multi_line() method to srcgen.Formatter.
Write out multiple code lines from a single string after stripping a
common indentation.

Also use this for doc_comment().
2017-07-07 15:10:17 -07:00
Jakob Stoklund Olesen
f0abff3611 Handle tied operands that are not killed by their use.
Any tied register uses are interesting enough to be added to the reguses
list if their value is not killed.

A copy needs to be inserted in that case.
2017-07-05 15:48:06 -07:00
Jakob Stoklund Olesen
64f6a98abe Test a tied operand following a fixed register operand.
The redefined tied value lives in the diverted register.
2017-07-05 15:48:06 -07:00
Jakob Stoklund Olesen
60efc68931 Only print pressure for toprcs containing registers.
Many ISAs don't need 4 top-level register classes, so don't print them.
2017-07-05 15:48:06 -07:00
Jakob Stoklund Olesen
9662f102e5 Intel 32-bit encodings for copy.i32. 2017-07-05 15:48:06 -07:00
d1m0
01abbcbebe Cleanup typos; Remove SAMEAS; More descriptive rank comments; Introduce explicit sorting in free_typevars() (#111)
As per the comment in TypeEnv.normalize_tv about cancellation, whenever we create a TypeVar we must assert that there is no under/overflow. To make sure this always happen move the safety checks to TypeVar.derived() from the other helper methods
2017-07-05 15:47:44 -07:00
Jakob Stoklund Olesen
b7917fe404 Test two consecutive fixed operands.
We need to move the previous value out of the way first.
2017-07-05 12:21:58 -07:00
Jakob Stoklund Olesen
e7db3f2b3a Add a test with a fixed register constraint.
Make sure we use the diverted register location for tied operands.
2017-07-05 12:08:53 -07:00
Jakob Stoklund Olesen
9108716cb7 Implement fmt::Display for AllocatableSet.
Also add a display() method which accepts a RegInfo reference.
2017-07-05 12:08:53 -07:00
d1m0
e35398842d Add better type inference and encapsulate it in its own file (#110)
* Add more rigorous type inference and encapsulate the type inferece code in its own file (ti.py).

Add constraints accumulation during type inference, to represent constraints that cannot be expressed
using bijective derivation functions between typevars.

Add testing for new type inference code.

* Additional annotations to appease mypy
2017-07-05 09:16:44 -07:00
Denis Merigoux
e63c581859 Fixed bug in verifier (#109)
* Fixed bug in verifier
Does not check variable def for unreachable codex

* Check reachability first + file test
2017-07-05 08:44:51 -07:00
Jakob Stoklund Olesen
0d2d1ea8cf Add support for tied operands.
Include a very basic test using an Intel 'sub' instruction. More to
follow.
2017-06-30 13:36:41 -07:00
Jakob Stoklund Olesen
811c1059fc Add Intel call/return encodings. 2017-06-30 12:21:36 -07:00
Jakob Stoklund Olesen
c592d3174f Add Intel iconst.i32 encoding. 2017-06-30 11:41:06 -07:00
Jakob Stoklund Olesen
7bc2e82b16 Implement the basics of the x86-64 ABI.
This is just a rough sketch to get us started. There are bound to be
some issues.

This also legalizes signatures for x86-32, but probably not correctly.
It's basically implementing the x86-64 ABI for 32-bit.
2017-06-30 10:41:26 -07:00
Jakob Stoklund Olesen
983048cdd1 Generate an enum with all the register units in a target.
It is sometimes useful to create constant lists of register units by
name. The generated RU enum can be used for that.
2017-06-30 10:39:51 -07:00
Jakob Stoklund Olesen
aa3bf4467e Hook up the handling of tied register constraints.
Tests are forthcoming, we need to implement Intel ABI lowering first.
2017-06-30 08:41:54 -07:00
Jakob Stoklund Olesen
18dc420352 Repair constraint violations during spilling.
The following constraints may need to be resolved during spilling
because the resolution increases register pressure:

- A tied operand whose value is live through the instruction.
- A fixed register constraint for a value used more than once.
- A register use of a spilled value needs to account for the reload
  register.
2017-06-29 16:51:05 -07:00
Jakob Stoklund Olesen
2b999d9bd6 Add an Index<Value> implementation to Liveness.
Use it to access live ranges that are supposed to be there.
2017-06-29 15:13:04 -07:00
Jakob Stoklund Olesen
138d3c75c6 Spill live-ins and EBB arguments if there are too many. 2017-06-29 14:07:19 -07:00
Jakob Stoklund Olesen
ae661631aa Only color EBB arguments that have register affinity.
It is possible to pass a register value as an argument to an EBB that
expects a "None" affinity. In that case, the destination EBB value
should not be colored.
2017-06-29 13:29:43 -07:00
Jakob Stoklund Olesen
d6f73ac4c8 Split spill_from() into spill_candidate() and spill_reg().
We'll need to pick a spill candidate from a set and allow for the search
to fail to find anything.

This also allows slightly better panic messages when we run out of
registers.
2017-06-29 11:11:46 -07:00
Jakob Stoklund Olesen
588ef0ad2f Propagate affinities for EBB arguments.
A priory, an EBB argument value only gets an affinity if it is used
directly by a non-ghost instruction. A use by a branch passing arguments
to an EBB doesn't count.

When an EBB argument value does have an affinity, the values passed by
all the predecessors must also have affinities. This can cause EBB
argument values to get affinities recursively.

- Add a second pass to the liveness computation for propagating EBB
  argument affinities, possibly recursively.
- Verify EBB argument affinities correctly: A value passed to a branch
  must have an affinity only if the corresponding EBB argument value in
  the destination has an affinity.
2017-06-29 10:30:26 -07:00
Jakob Stoklund Olesen
e7a543ea33 Make sure return values are assigned an affinity.
When an EBB argument value is used only as a return value, it still
needs to be given a register affinity. Otherwise it would appear as a
ghost value with no affinity.

Do the same to call arguments.
2017-06-29 09:24:05 -07:00
Jakob Stoklund Olesen
0574dcdeee Don't coalesce incoming stack arguments.
A function parameter in an incoming_arg stack slot should not be
coalesced into any virtual registers. We don't want to force the whole
virtual register to spill to the incoming_arg slot.
2017-06-28 15:37:38 -07:00
Jakob Stoklund Olesen
b2fda76c5f Assign stack slots to incoming function arguments.
Function arguments that don't fit in registers are passed on the stack.

Create "incoming_arg" stack slots representing the stack arguments, and
assign them to the value arguments during spilling.
2017-06-28 15:03:59 -07:00
Jakob Stoklund Olesen
05cf44a156 Add an offset to StackSlotData.
The offset is relative to the stack pointer in the calling function, so
it excludes the return address pushed by the call instruction itself on
Intel ISAs.

Change the ArgumentLoc::Stack offset to an i32, so it matches the stack
slot offsets.
2017-06-28 14:38:13 -07:00
Jakob Stoklund Olesen
bbdf07a64e Color EBB arguments.
When coloring registers for a branch instruction, also make sure that
the values passed as EBB arguments are in the registers expected by the
EBB.

The first time a branch to an EBB is processed, assign the EBB arguments
to the registers where the branch arguments already reside so no
regmoves are needed.
2017-06-27 16:35:38 -07:00
Jakob Stoklund Olesen
165e80d9bf Process ghost instruction kills during coloring.
Ghost instructions don't generate code, but they can keep registers
alive. The coloring pass needs to process values killed by ghost
instructions so it knows when the registers are freed up.

Also track register pressure changes from ghost kills in the spiller.
2017-06-27 16:35:11 -07:00
Dimo
c073d919f4 Cleanup ValueType.get_names to with_bits form previous PR; Add computation of inverse image of typeset across a derived function - TypeSet.map_inverse; Change TypeVar.constrain_type to perform a more-general computation using inverse images of TypeSets; Tests for map_inverse; 2017-06-26 11:11:28 -07:00
d1m0
7c298078c8 Add image computation of typesets; Remove TypeVar.singleton_type - instead derive singleton type from typeset; (#104) 2017-06-23 11:57:24 -07:00
Jakob Stoklund Olesen
222ea74830 Spill whole virtual registers at a time.
When the spiller decides to spill a value, bring along all of the values
in its virtual register. This ensures that we won't have problems with
computing register pressure around EBB arguments. They will always be
register-to-register or stack-to-stack with related values using the
same stack slot.

This also means that the reloading pass won't have to deal with spilled
EBB arguments.
2017-06-23 10:43:59 -07:00
Dan Gohman
a79703c23f Add rusty-tags.* to .gitignore. 2017-06-23 09:36:21 -07:00
d1m0
da24bd422a Convert interval sets inside TypeSet/ValueTypeSet in general sets (#102)
* Convert TypeSet fields to sets; Add BitSet<T> type to rust; Encode ValueTypeSets using BitSet; (still need mypy cleanup)

* nits

* cleanup nits

* forgot mypy type annotations

* rustfmt fixes

* Round 1 comments: filer b2, b4; doc comments in python; move bitset in its own toplevel module; Use Into<u32>

* fixes

* Revert comment to appease rustfmt
2017-06-22 16:47:14 -07:00
Jakob Stoklund Olesen
85b624d13b Add a coalescing pass to the register allocator.
Coalescing means creating virtual registers and transforming the code
into conventional SSA form. This means that every value used as a branch
argument will belong to the same virtual register as the corresponding
EBB argument value.

Conventional SSA form makes it easy to avoid memory-memory copies when
spilling values, and the virtual registers can be used as hints when
picking registers too. This reduces the number of register moves needed
for EBB arguments.
2017-06-22 15:03:48 -07:00
Jakob Stoklund Olesen
d5055275c4 Virtual registers.
Add a VirtRegs collection which tracks virtual registers.

A virtual register is a set of related SSA values whose live ranges
don't interfere. It is advantageous to use the same register or spill
slot for al the values in a virtual register. It reduces copies for EBB
arguments.
2017-06-22 14:51:10 -07:00
Jakob Stoklund Olesen
d079dead9a Skip ghost instructions when coloring.
Ghost instructions don't have an encoding, and don't appear in the
output. The values they define do not need to be assigned to registers,
so they can be skipped.
2017-06-22 14:49:43 -07:00
Jakob Stoklund Olesen
03a856f4da Implement Display and Debug for the program point types. 2017-06-22 14:49:43 -07:00
Jakob Stoklund Olesen
10e4b2fa06 Add two interference checking methods to LiveInterval.
The overlaps_def() method tests if a definition would conflict with the
live range.

The reaches_use() method tests if a live range is live at an
instruction.
2017-06-22 14:49:43 -07:00
Dan Gohman
0f53fe1913 Add a simple_gvn test that includes some basic control flow. 2017-06-22 14:34:21 -07:00
Jakob Stoklund Olesen
e15c332471 Encode iconst.i32 for RISC-V.
For large constants with the low 12 bits clear, we already have the
"lui" encoding. Add "addi %x0" encodings for signed 12-bit constants.
2017-06-22 12:13:37 -07:00
Dan Gohman
4a5d48fe11 Documentation fixes (#103)
* Clarify that extended basic blocks are abbreviated as EBB.

* Fix typo.

* Fix a typo.

* Fix typos.

* Use the same phrase to indicate scalar-only as other places in the doc.

* Mention that `band_imm` and friends are scalar-only.

And mention that they're equivalent to their respective
non-immediate-form counterparts.
2017-06-22 12:01:32 -07:00
Jakob Stoklund Olesen
b6cff6a98a Move EntityRef and entity_impl! into a new module.
The EntityRef trait is used by more than just the EntityMap now, so it
should live in its own module.

Also move the entity_impl! macro into the new module so it can be used
for defining new entity references anywhere.
2017-06-20 10:16:27 -07:00
Dan Gohman
0c7316ae28 Lint fixes (#99)
* Replace a single-character string literal with a character literal.

* Use is_some() instead of comparing with Some(_).

* Add code-quotes around type names in comments.

* Use !...is_empty() instead of len() != 0.

* Tidy up redundant returns.

* Remove redundant .clone() calls.

* Remove unnecessary explicit lifetime parameters.

* Tidy up unnecessary '&'s.

* Add parens to make operator precedence explicit.

* Use debug_assert_eq instead of debug_assert with ==.

* Replace a &Vec argument with a &[...].

* Replace `a = a op b` with `a op= b`.

* Avoid unnecessary closures.

* Avoid .iter() and .iter_mut() for iterating over containers.

* Remove unneeded qualification.
2017-06-19 16:24:10 -07:00
Aleksey Kuznetsov
3693735874 Implement an iterator over encodings (#96)
* Implement an iterator over encodings

* Implement TargetIsa::legal_encodings

* Exclude non-boolean settings of isa flags bytes

* Address flake8 long line error
2017-06-19 08:52:19 -07:00
Jakob Stoklund Olesen
1dd8d913aa Assign spill slots to spilled values.
As soon as a value is spilled, also assign it to a spill slot.

For now, create a new spill slot for each spilled value. In the future,
values will be sharing spill slots of they are phi-related.
2017-06-16 13:34:18 -07:00