Commit Graph

2265 Commits

Author SHA1 Message Date
Andrew Brown
057c93b64e Add unarrow instruction with x86 implementation
Adds a shared `unarrow` instruction in order to lower the Wasm SIMD specification's unsigned narrowing (see https://github.com/WebAssembly/simd/blob/master/proposals/simd/SIMD.md#integer-to-integer-narrowing). Additionally, this commit implements the instruction for x86 using PACKUSWB and PACKUSDW for the applicable encodings.
2020-07-02 09:35:45 -07:00
Andrew Brown
65e6de2344 Replace x86_packss with snarrow
Since the Wasm specification contains narrowing instructions (see https://github.com/WebAssembly/simd/blob/master/proposals/simd/SIMD.md#integer-to-integer-narrowing) that lower to PACKSS*, the x86-specific instruction is not necessary in the CLIF IR.
2020-07-02 09:35:45 -07:00
Andrew Brown
152d7fcee7 Fix typo and wording of CDSL error messages 2020-07-02 09:35:45 -07:00
Benjamin Bouvier
8e257e731e cranelift-wasm: expose cranelift-frontend's FunctionBuilder in the public API; 2020-07-02 12:36:43 +02:00
Johnnie Birch
0aa56c500c Add x64 lowering of Clif flt load instruction for new backend
Adds support for the clif flt load instruction.
2020-07-01 17:48:33 -07:00
Johnnie Birch
f2dd1535d5 Add x64 lowering of Clif flt store instruction for new backend
Adds support for the clif flt store instruction.
2020-07-01 14:54:59 -07:00
Chris Fallin
0a59a321bd Merge pull request #1954 from cfallin/b1649432
AArch64: fix shift ops: mask shift amount.
2020-07-01 09:33:29 -07:00
Chris Fallin
a351fa52b5 Merge pull request #1930 from cfallin/spectre-heap
Spectre mitigation on heap access overflow checks.
2020-07-01 09:23:04 -07:00
Chris Fallin
533f1c8d8b Aarch64: fix shift ops: mask shift amount.
The failure to mask the amount triggered a panic due to a subtraction
overflow check; see
https://bugzilla.mozilla.org/show_bug.cgi?id=1649432. Attempting to
shift by an out-of-range amount should be defined to shift by an amount
mod the operand size (i.e., masked to 5 bits for 32-bit shifts, or 6
bits for 64-bit shifts).
2020-07-01 08:57:56 -07:00
Chris Fallin
e694fb1312 Spectre mitigation on heap access overflow checks.
This PR adds a conditional move following a heap bounds check through
which the address to be accessed flows. This conditional move ensures
that even if the branch is mispredicted (access is actually out of
bounds, but speculation goes down in-bounds path), the acually accessed
address is zero (a NULL pointer) rather than the out-of-bounds address.

The mitigation is controlled by a flag that is off by default, but can
be set by the embedding. Note that in order to turn it on by default,
we would need to add conditional-move support to the current x86
backend; this does not appear to be present. Once the deprecated
backend is removed in favor of the new backend, IMHO we should turn
this flag on by default.

Note that the mitigation is unneccessary when we use the "huge heap"
technique on 64-bit systems, in which we allocate a range of virtual
address space such that no 32-bit offset can reach other data. Hence,
this only affects small-heap configurations.
2020-07-01 08:36:09 -07:00
Till Schneidereit
f80c2abffb Update various crates' object and wast dependencies (#1908)
This somewhat cuts down on duplicate dependencies. `wast` is used in a much older version (`11.0.0`) by `witx`, and can be updated without issues there as well, but this at least gets us from 3 copies to 2.
2020-07-01 09:11:38 -05:00
Benjamin Bouvier
de9fbfa095 machinst x64: correctly assign FP registers for incoming args;
Fixes #1943.

Thanks to @jlb6740 for noticing the issue and @bjorn3 for catching the
error!
2020-07-01 15:00:43 +02:00
Andrew Brown
c3993a5f8e Translate Wasm SIMD abs to Cranelift's iabs instruction 2020-06-30 14:00:17 -07:00
Andrew Brown
737cf1d605 Implement iabs for x86 SIMD
This only covers the types necessary for implementing the Wasm SIMD spec--`i8x16`, `i16x8`, `i32x4`.
2020-06-30 14:00:17 -07:00
Andrew Brown
26bdf9c333 Add iabs instructions.rs
This is necessary for implementing SIMD [abs](https://github.com/WebAssembly/simd/blob/master/proposals/simd/SIMD.md#lane-wise-integer-absolute-value).
2020-06-30 14:00:17 -07:00
Nick Fitzgerald
a2f4202800 cranelift-frontend: Add the FunctionBuilder::insert_block_after method 2020-06-30 12:00:57 -07:00
Nick Fitzgerald
8c5f59c0cf wasmtime: Implement table.get and table.set
These instructions have fast, inline JIT paths for the common cases, and only
call out to host VM functions for the slow paths. This required some changes to
`cranelift-wasm`'s `FuncEnvironment`: instead of taking a `FuncCursor` to insert
an instruction sequence within the current basic block,
`FuncEnvironment::translate_table_{get,set}` now take a `&mut FunctionBuilder`
so that they can create whole new basic blocks. This is necessary for
implementing GC read/write barriers that involve branching (e.g. checking for
null, or whether a store buffer is at capacity).

Furthermore, it required that the `load`, `load_complex`, and `store`
instructions handle loading and storing through an `r{32,64}` rather than just
`i{32,64}` addresses. This involved making `r{32,64}` types acceptable
instantiations of the `iAddr` type variable, plus a few new instruction
encodings.

Part of #929
2020-06-30 12:00:57 -07:00
Alex Crichton
0acd2072c2 Fix doc warnings and link failures (#1948)
Also add configuration to CI to fail doc generation if any links are
broken. Unfortunately we can't blanket deny all warnings in rustdoc
since some are unconditional warnings, but for now this is hopefully
good enough.

Closes #1947
2020-06-30 13:01:49 -05:00
Nick Fitzgerald
dee2bf14a9 Merge pull request #1944 from declanvk/issue-1705
Implement customer [de]serialization for `IntegerInterner`
2020-06-30 09:58:05 -07:00
Andrew Brown
4d57ae99e3 Upgrade wasmparser to 0.58.0 (#1942)
* Upgrade wasmparser to 0.58.0

* Enable more spec tests
2020-06-30 11:08:21 -05:00
Declan Kelly
a3feb8a412 Implement customer [de]serialization for IntegerInterner
Added some basic tests that the representation of the interner
is only the `values` sequence, and that it round-trips successfully.
2020-06-30 01:21:27 -07:00
Nick Fitzgerald
43f8453b34 Merge pull request #1937 from fitzgen/upgrade-z3-for-peepmatic
deps: Bump `z3` to 0.6.0
2020-06-29 11:19:31 -07:00
Nick Fitzgerald
0bc0fd54eb deps: Bump z3 to 0.6.0
Z3 is used by `peepmatic`.
2020-06-29 10:41:22 -07:00
Andrew Brown
c9d573d841 Provide spec-compliant legalization for SIMD floating point min/max 2020-06-25 14:48:16 -07:00
Alex Crichton
a92a31d850 Rename the master branch to main (#1924)
* This PR is against a branch called `main`
* Internally all docs/CI/etc is updated
* The default branch of the repo is now `main`
* All active PRs have been updated to retarget `main`

Closes #1914
2020-06-25 14:03:21 -05:00
Benjamin Bouvier
c9a3f05afd machinst x64: implement calls and int cmp/store/loads;
This makes it possible to run a simple recursive fibonacci function in
wasmtime.
2020-06-25 16:20:33 +02:00
Johnnie Birch
2d364f75bd Remove xmm_r_r inst data structure and cases after related refactoring
Removes unneeded data structure that was holding instructions for
xmm based move instructions. These instructions can should be categorized
as rm not just r. This change is intended to simplify organization and
cases when lowering.
2020-06-25 14:31:51 +02:00
Johnnie Birch
f2f7706265 Implements vcode lowering for f32.copysign.
This patch implements the required but not already available
x64 instructions for copysign as well as the actual lowering sequence
and tests for the newly implemented x64 instructions.
Those instructions include:

andps,
andnps,
movaps,
movd,
orps,

The lowering sequence is based on the lowering for f32.copysign
in the current cranelift backend. movd does not have a test yet
due to some logic needed express a 32-bit register as a source
for xmm_rm_r instructions. This code also begins some
rethinking/refactoring of how the sse move instuctions
are written and so also includes new emit cases that will replace
current ones that match a different enum used to describe sse moves.
2020-06-24 11:47:26 -07:00
Nick Fitzgerald
58bb5dd953 wasmtime: Add support for func.ref and table.grow with funcrefs
`funcref`s are implemented as `NonNull<VMCallerCheckedAnyfunc>`.

This should be more efficient than using a `VMExternRef` that points at a
`VMCallerCheckedAnyfunc` because it gets rid of an indirection, dynamic
allocation, and some reference counting.

Note that the null function reference is *NOT* a null pointer; it is a
`VMCallerCheckedAnyfunc` that has a null `func_ptr` member.

Part of #929
2020-06-24 10:08:13 -07:00
Nick Fitzgerald
ddc2ce8080 cranelift-wasm: Make FuncEnvironment::translate_ref_func take a FuncIndex
It was previously taking a raw `u32`. This change makes it more clear what index
space that index points into.
2020-06-23 16:36:10 -07:00
Nick Fitzgerald
c6f32f666d cranelift-wasm: Retain both the Wasm and Cranelift types of tables 2020-06-23 16:36:10 -07:00
Nick Fitzgerald
03165e0cb5 cranelift-wasm: Allow more customization of ref type representations
* Allow different Cranelift IR types to be used for different Wasm reference
  types.

* Do not assume that all Wasm reference types are always a Cranelift IR
  reference type. For example, `funcref`s might not need GC in some
  implementations, and can therefore be represented with a pointer rather than a
  reference type.
2020-06-23 16:36:10 -07:00
Nick Fitzgerald
28fccaedc4 cranelift-wasm: Pass ir::Tables into all the translate_table_* methods
This serves two purposes:

1. It ensures that we call `get_or_create_table` to ensure that the embedder
already had a chance to create the given table (although this is mostly
redundant due to validation).

2. It allows the embedder to easily get the `ir::TableData` associated with this
table, and more easily emit whatever inline JIT code to translate the table
instruction (rather than falling back to VM calls).
2020-06-23 16:36:10 -07:00
Chris Fallin
9751b96c5e Merge pull request #1900 from cfallin/clarify-lowering-docs
MachInst isel and aarch64 backend: docs / clarity improvements.
2020-06-23 09:59:07 -07:00
Benjamin Bouvier
60ac091afe Remove unused dependencies in Cranelift; 2020-06-22 08:45:09 -07:00
Benjamin Bouvier
4f6a002f70 cranelift-filetests: tell when a run test is skipped (fixes #1558); 2020-06-18 16:11:21 -07:00
Chris Fallin
492000e945 MachInst isel and aarch64 backend: docs / clarity improvements.
From discussion with Julian and Ben, this PR makes a few documentation-
and naming-level changes (no functionality change):

- Document that the `LowerCtx`-provided output register can be used as a
  scratch register during the lowered instruction sequence before
  placing the final result in it.

- Rename `input_to_*` helpers in the AArch64 backend to
  `put_input_in_*`, emphasizing that these are side-effecting helpers
  that potentially generate code (e.g., sign/zero-extensions) to ensure
  an input value is in a register.
2020-06-18 12:18:50 -07:00
Chris Fallin
f84903fa43 Merge pull request #1892 from akirilov-arm/simd_fp_cmp
AArch64: Implement SIMD floating-point comparisons
2020-06-18 12:17:09 -07:00
Andrew Brown
6c05590104 Translate Wasm's i32x4.trunc_sat_f32x4_s instruction to Cranelift's fcvt_to_sint_sat 2020-06-18 11:39:38 -07:00
Andrew Brown
3675f95bb2 Legalize fcvt_to_sint_sat.i32x4 on x86
Use a lengthy sequence involving CVTTPS2DQ to quiet NaNs and saturate overflow.
2020-06-18 11:39:38 -07:00
Andrew Brown
3740772176 Add encoding for x86 CVTTPS2DQ
This reuses the `x86_cvtt2si` instruction since the packed and scalar versions seem to group together well.
2020-06-18 11:39:38 -07:00
Anton Kirilov
90bafae1dc AArch64: Implement SIMD floating-point comparisons
Copyright (c) 2020, Arm Limited.
2020-06-18 11:07:52 +01:00
Johnnie Birch
043571fee0 Adds f32.mul, f32.div for vcode backend for x64.
Adds support for lowering clif instructions Fdiv and Fmul
for new vcode backend. Misc adds lowering and test for
sqrtss and removes a redundant to_string() func for the
SseOpcode struct.
2020-06-17 17:19:57 -07:00
Pat Hickey
4f72a7483b Merge pull request #1836 from carlokok/feature/object_file_section
Cranelift: Module data apis should allow specifying the object file section
2020-06-17 10:49:09 -07:00
Chris Fallin
4dd1363581 Merge pull request #1890 from jgouly/simd-bool
arm64: Implement AllTrue and AnyTrue
2020-06-17 09:38:10 -07:00
Benjamin Bouvier
c2692ecb8a Wasmtime: allow using the experimental Cranelift x64 backend in cli;
This introduces two changes:

- first, a Cargo feature is added to make it possible to use the
Cranelift x64 backend directly from wasmtime's CLI.
- second, when passing a `cranelift-flags` parameter, and the given
parameter's name doesn't exist at the target-independent flag level, try
to set it as a target-dependent setting.

These two changes make it possible to try out the new x64 backend with:

    cargo run --features experimental_x64 -- run --cranelift-flags use_new_backend=true -- /path/to/a.wasm

Right now, this will fail because most opcodes required by the
trampolines are actually not implemented yet.
2020-06-17 17:18:46 +02:00
Joey Gouly
0f462330e0 arm64: Implement AllTrue and AnyTrue
This enables the simd_boolean WASM SIMD spec test.

Copyright (c) 2020, Arm Limited.
2020-06-17 15:40:51 +01:00
Carlo Kok
b2549d1fde Rust fmt fixes 2020-06-17 06:46:58 +02:00
Carlo Kok
0b613caad1 Address concerns in pullrequests. 2020-06-15 20:46:04 +02:00
Nick Fitzgerald
f30ce1fe97 externref: implement stack map-based garbage collection
For host VM code, we use plain reference counting, where cloning increments
the reference count, and dropping decrements it. We can avoid many of the
on-stack increment/decrement operations that typically plague the
performance of reference counting via Rust's ownership and borrowing system.
Moving a `VMExternRef` avoids mutating its reference count, and borrowing it
either avoids the reference count increment or delays it until if/when the
`VMExternRef` is cloned.

When passing a `VMExternRef` into compiled Wasm code, we don't want to do
reference count mutations for every compiled `local.{get,set}`, nor for
every function call. Therefore, we use a variation of **deferred reference
counting**, where we only mutate reference counts when storing
`VMExternRef`s somewhere that outlives the activation: into a global or
table. Simultaneously, we over-approximate the set of `VMExternRef`s that
are inside Wasm function activations. Periodically, we walk the stack at GC
safe points, and use stack map information to precisely identify the set of
`VMExternRef`s inside Wasm activations. Then we take the difference between
this precise set and our over-approximation, and decrement the reference
count for each of the `VMExternRef`s that are in our over-approximation but
not in the precise set. Finally, the over-approximation is replaced with the
precise set.

The `VMExternRefActivationsTable` implements the over-approximized set of
`VMExternRef`s referenced by Wasm activations. Calling a Wasm function and
passing it a `VMExternRef` moves the `VMExternRef` into the table, and the
compiled Wasm function logically "borrows" the `VMExternRef` from the
table. Similarly, `global.get` and `table.get` operations clone the gotten
`VMExternRef` into the `VMExternRefActivationsTable` and then "borrow" the
reference out of the table.

When a `VMExternRef` is returned to host code from a Wasm function, the host
increments the reference count (because the reference is logically
"borrowed" from the `VMExternRefActivationsTable` and the reference count
from the table will be dropped at the next GC).

For more general information on deferred reference counting, see *An
Examination of Deferred Reference Counting and Cycle Detection* by Quinane:
https://openresearch-repository.anu.edu.au/bitstream/1885/42030/2/hon-thesis.pdf

cc #929

Fixes #1804
2020-06-15 09:39:37 -07:00