Cranelift: aarch64: lower umin.i64 and friends (#5495)
* Cranelift: aarch64: lower umin.i64 and friends * fuzzgen: Enable integer-min/max for aarch64
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@@ -887,6 +887,36 @@
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;;; Rules for integer min/max: umin, smin, umax, smax ;;;;;;;;;;;;;;;;;;;;;;;;;
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;; `i64` and smaller.
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;; cmp $x, $y
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;; csel .., $x, $y, $cc
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(decl cmp_and_choose (Type Cond bool Value Value) ValueRegs)
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(rule (cmp_and_choose (fits_in_64 ty) cc _ x y)
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(let ((x Reg (put_in_reg x))
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(y Reg (put_in_reg y)))
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(with_flags_reg (cmp (operand_size ty) x y)
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(csel cc x y))))
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;; `i16` and `i8` min/max require sign extension as
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;; the comparison operates on (at least) 32 bits.
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(rule 1 (cmp_and_choose (fits_in_16 ty) cc signed x y)
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(let ((x Reg (extend (put_in_reg x) signed (ty_bits ty) 32))
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(y Reg (extend (put_in_reg y) signed (ty_bits ty) 32)))
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(with_flags_reg (cmp (operand_size ty) x y)
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(csel cc x y))))
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(rule 2 (lower (has_type (and (fits_in_64 ty) (ty_int _)) (umin x y)))
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(cmp_and_choose ty (Cond.Lo) $false x y))
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(rule 2 (lower (has_type (and (fits_in_64 ty) (ty_int _)) (smin x y)))
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(cmp_and_choose ty (Cond.Lt) $true x y))
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(rule 2 (lower (has_type (and (fits_in_64 ty) (ty_int _)) (umax x y)))
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(cmp_and_choose ty (Cond.Hi) $false x y))
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(rule 2 (lower (has_type (and (fits_in_64 ty) (ty_int _)) (smax x y)))
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(cmp_and_choose ty (Cond.Gt) $true x y))
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;; Vector types.
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(rule (lower (has_type ty @ (not_i64x2) (smin x y)))
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(vec_rrr (VecALUOp.Smin) x y (vector_size ty)))
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@@ -1,6 +1,6 @@
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test interpret
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test run
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; target aarch64
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target aarch64
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; target s390x
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target x86_64
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target riscv64
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@@ -134,4 +134,19 @@ block0(v0: i64, v1: i64):
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; run: %umin_max_i64(1, 2) == [1, 2]
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; run: %umin_max_i64(2, 1) == [1, 2]
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; run: %umin_max_i64(0x7fffffff, 0x80000000) == [0x7fffffff, 0x80000000]
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; run: %umin_max_i64(0x7fffffffffffffff, 0x8000000000000000) == [0x7fffffffffffffff, 0x8000000000000000]
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; run: %umin_max_i64(0x7fffffffffffffff, 0x8000000000000000) == [0x7fffffffffffffff, 0x8000000000000000]
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; make sure that upper/uninitialized parts of operand registers do not leak
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; inside of the comparison
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function %umin_max_i32_trunc_to_i8(i32, i32) -> i8, i8 {
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block0(v0: i32, v1: i32):
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v2 = ireduce.i8 v0
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v3 = ireduce.i8 v1
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v4 = umin.i8 v2, v3
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v5 = umax.i8 v2, v3
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return v4, v5
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}
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; run: %umin_max_i32_trunc_to_i8(1, 2) == [1, 2]
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; run: %umin_max_i32_trunc_to_i8(0xBB01, 0xAA02) == [1, 2]
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; run: %umin_max_i32_trunc_to_i8(0xBB02, 0xABCD0001) == [1, 2]
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; run: %umin_max_i32_trunc_to_i8(0x1234567f, 0x12345680) == [0x7f, 0x80]
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@@ -365,58 +365,42 @@ const OPCODE_SIGNATURES: &'static [(
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#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
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(Opcode::Iabs, &[I128], &[I128], insert_opcode),
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// Smin
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// smin not implemented in some backends:
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// smin.i128 is not implemented in some backends:
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// x64: https://github.com/bytecodealliance/wasmtime/issues/3370
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// aarch64: https://github.com/bytecodealliance/wasmtime/issues/4313
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#[cfg(not(target_arch = "aarch64"))]
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(Opcode::Smin, &[I8, I8], &[I8], insert_opcode),
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#[cfg(not(target_arch = "aarch64"))]
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(Opcode::Smin, &[I16, I16], &[I16], insert_opcode),
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#[cfg(not(target_arch = "aarch64"))]
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(Opcode::Smin, &[I32, I32], &[I32], insert_opcode),
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#[cfg(not(target_arch = "aarch64"))]
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(Opcode::Smin, &[I64, I64], &[I64], insert_opcode),
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#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
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(Opcode::Smin, &[I128, I128], &[I128], insert_opcode),
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// Umin
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// umin not implemented in some backends:
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// umin.i128 is not implemented in some backends:
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// x64: https://github.com/bytecodealliance/wasmtime/issues/3370
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// aarch64: https://github.com/bytecodealliance/wasmtime/issues/4313
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#[cfg(not(target_arch = "aarch64"))]
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(Opcode::Umin, &[I8, I8], &[I8], insert_opcode),
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#[cfg(not(target_arch = "aarch64"))]
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(Opcode::Umin, &[I16, I16], &[I16], insert_opcode),
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#[cfg(not(target_arch = "aarch64"))]
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(Opcode::Umin, &[I32, I32], &[I32], insert_opcode),
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#[cfg(not(target_arch = "aarch64"))]
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(Opcode::Umin, &[I64, I64], &[I64], insert_opcode),
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#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
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(Opcode::Umin, &[I128, I128], &[I128], insert_opcode),
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// Smax
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// smax not implemented in some backends:
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// smax.i128 is not implemented in some backends:
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// x64: https://github.com/bytecodealliance/wasmtime/issues/3370
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// aarch64: https://github.com/bytecodealliance/wasmtime/issues/4313
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#[cfg(not(target_arch = "aarch64"))]
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(Opcode::Smax, &[I8, I8], &[I8], insert_opcode),
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#[cfg(not(target_arch = "aarch64"))]
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(Opcode::Smax, &[I16, I16], &[I16], insert_opcode),
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#[cfg(not(target_arch = "aarch64"))]
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(Opcode::Smax, &[I32, I32], &[I32], insert_opcode),
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#[cfg(not(target_arch = "aarch64"))]
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(Opcode::Smax, &[I64, I64], &[I64], insert_opcode),
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#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
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(Opcode::Smax, &[I128, I128], &[I128], insert_opcode),
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// Umax
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// umax not implemented in some backends:
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// umax.i128 is not implemented in some backends:
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// x64: https://github.com/bytecodealliance/wasmtime/issues/3370
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// aarch64: https://github.com/bytecodealliance/wasmtime/issues/4313
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#[cfg(not(target_arch = "aarch64"))]
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(Opcode::Umax, &[I8, I8], &[I8], insert_opcode),
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#[cfg(not(target_arch = "aarch64"))]
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(Opcode::Umax, &[I16, I16], &[I16], insert_opcode),
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#[cfg(not(target_arch = "aarch64"))]
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(Opcode::Umax, &[I32, I32], &[I32], insert_opcode),
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#[cfg(not(target_arch = "aarch64"))]
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(Opcode::Umax, &[I64, I64], &[I64], insert_opcode),
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#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
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(Opcode::Umax, &[I128, I128], &[I128], insert_opcode),
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