diff --git a/filetests/regalloc/constraints.cton b/filetests/regalloc/constraints.cton
index c6108b0673..28758a3bdd 100644
--- a/filetests/regalloc/constraints.cton
+++ b/filetests/regalloc/constraints.cton
@@ -2,6 +2,7 @@ test regalloc
 isa intel
 
 ; regex: V=v\d+
+; regex: REG=%r([abcd]x|[sd]i)
 
 ; Tied operands, both are killed at instruction.
 function %tied_easy() -> i32 {
@@ -26,3 +27,20 @@ ebb0:
     v2 = ishl v1, v0
     return v2
 }
+
+; Fixed register constraint twice.
+function %fixed_op_twice() -> i32 {
+ebb0:
+    ; check: ,%rax]
+    ; sameln: $v0 = iconst.i32 12
+    v0 = iconst.i32 12
+    v1 = iconst.i32 13
+    ; The dynamic shift amount must be in %rcx
+    ; check: regmove $v0, %rax -> %rcx
+    v2 = ishl v1, v0
+    ; check: regmove $v0, %rcx -> $REG
+    ; check: regmove $v2, $REG -> %rcx
+    v3 = ishl v0, v2
+
+    return v3
+}