Add func_addr encodings for Intel.
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@@ -243,6 +243,13 @@ enc_flt(base.store.f64.any, r.fst, 0x66, 0x0f, 0xd6)
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enc_flt(base.store.f64.any, r.fstDisp8, 0x66, 0x0f, 0xd6)
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enc_flt(base.store.f64.any, r.fstDisp32, 0x66, 0x0f, 0xd6)
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#
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# Function addresses.
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#
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I32.enc(base.func_addr.i32, *r.fnaddr4(0xb8))
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I64.enc(base.func_addr.i64, *r.fnaddr8.rex(0xb8, w=1))
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#
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# Call/return
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#
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@@ -7,7 +7,7 @@ from cdsl.predicates import IsSignedInt, IsEqual
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from base.formats import Unary, UnaryImm, Binary, BinaryImm, MultiAry
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from base.formats import Nullary, Call, IndirectCall, Store, Load
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from base.formats import IntCompare
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from base.formats import RegMove, Ternary, Jump, Branch
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from base.formats import RegMove, Ternary, Jump, Branch, FuncAddr
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from .registers import GPR, ABCD, FPR
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try:
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@@ -351,6 +351,26 @@ puiq = TailRecipe(
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sink.put8(imm as u64);
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''')
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# XX+rd id with Abs4 function relocation.
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fnaddr4 = TailRecipe(
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'fnaddr4', FuncAddr, size=4, ins=(), outs=GPR,
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emit='''
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PUT_OP(bits | (out_reg0 & 7), rex1(out_reg0), sink);
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sink.reloc_func(RelocKind::Abs4.into(), func_ref);
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// Write the immediate as `!0` for the benefit of BaldrMonkey.
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sink.put4(!0);
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''')
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# XX+rd iq with Abs8 function relocation.
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fnaddr8 = TailRecipe(
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'fnaddr8', FuncAddr, size=8, ins=(), outs=GPR,
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emit='''
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PUT_OP(bits | (out_reg0 & 7), rex1(out_reg0), sink);
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sink.reloc_func(RelocKind::Abs8.into(), func_ref);
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// Write the immediate as `!0` for the benefit of BaldrMonkey.
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sink.put8(!0);
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''')
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#
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# Store recipes.
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#
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