Fill in boilerplate for Intel and ARM targets.

The intel, arm32, and arm32 targets were only defined in the meta
language previously. Add Rust implementations too.

This is mostly boilerplate, except for the unit tests in the
registers.rs files.

lib/cretonne/meta/isa/arm64/__init__.py

@@ -7,7 +7,7 @@ ARMv8 CPUs running the Aarch64 architecture.
 
 from __future__ import absolute_import
 from . import defs
-from . import registers  # noqa
+from . import settings, registers  # noqa
 
 # Re-export the primary target ISA definition.
 ISA = defs.ISA.finish()

lib/cretonne/meta/isa/arm64/settings.py

@@ -0,0 +1,11 @@
+"""
+ARM64 settings.
+"""
+from __future__ import absolute_import
+from cdsl.settings import SettingGroup
+import base.settings as shared
+from .defs import ISA
+
+ISA.settings = SettingGroup('arm64', parent=shared.group)
+
+ISA.settings.close(globals())