Check the top-level register class for available registers.

Fixes #165.

The constraint solver's schedule_move() function sometimes need to use
an extra available register when the moves to be scheduled contains
cycles.

The pending moves have associated register classes that come from the
constraint programming. Since the moves have hard-coded to and from
registers, these register classes are only meant to indicate the
register sizes. In particular, we can use the whole top-level register
class when scavenging for a spare register to break a cycle.

cranelift/filetests/regalloc/schedule-moves.cton

@@ -0,0 +1,19 @@
+test compile
+set is_64bit=1
+isa intel haswell
+
+function %pr165() native {
+ebb0:
+    v0 = iconst.i64 0x0102_0304_f1f2_f3f4
+    v1 = iconst.i64 0x1102_0304_f1f2_f3f4
+    v2 = iconst.i64 0x2102_0304_f1f2_f3f4
+    v20 = ishl v1, v0
+    v21 = ishl v2, v0
+    v22 = sshr v1, v0
+    v23 = sshr v2, v0
+    v24 = ushr v1, v0
+    v25 = ushr v2, v0
+    istore8 v0, v1+0x2710
+    istore8 v1, v0+0x2710
+    return
+}