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aarch64: Migrate ineg to ISLE

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Needed a new `vec_misc` instruction construction helper but otherwise a
pretty straightforward translation.
This commit is contained in:
Alex Crichton
2021-11-19 07:19:21 -08:00
parent d1e9a7840e
commit fa63e7de5a
5 changed files with 473 additions and 383 deletions
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10
cranelift/codegen/src/isa/aarch64/lower.isle
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@@ -179,3 +179,13 @@
(rule (lower (has_type (vec128 ty) (ssub_sat x y)))
(value_reg (vec_rrr (VecALUOp.Sqsub) (put_in_reg x) (put_in_reg y) (vector_size ty))))
;;;; Rules for `ineg` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; `i64` and smaller.
(rule (lower (has_type (fits_in_64 ty) (ineg x)))
(value_reg (alu_rrr (isub_op ty) (zero_reg) (put_in_reg x))))
;; vectors.
(rule (lower (has_type (vec128 ty) (ineg x)))
(value_reg (vec_misc (VecMisc2.Neg) (put_in_reg x) (vector_size ty))))