T0b1/wasmtime
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Write .debug_frame information (#53)

Browse Source 
* Write .debug_frame information

* mv map_reg
This commit is contained in:
Yury Delendik
2020-03-11 10:22:51 -05:00
committed by GitHub
parent 2ead747f48
commit f76b36f737
16 changed files with 403 additions and 112 deletions
Download Patch File Download Diff File Expand all files Collapse all files

62
crates/debug/src/transform/expression.rs
View File

@@ -1,11 +1,12 @@
use super::address_transform::AddressTransform;
use anyhow::{bail, Context, Error, Result};
use gimli::{self, write, Expression, Operation, Reader, ReaderOffset, Register, X86_64};
use super::map_reg::map_reg;
use anyhow::{Context, Error, Result};
use gimli::{self, write, Expression, Operation, Reader, ReaderOffset, X86_64};
use more_asserts::{assert_le, assert_lt};
use std::collections::{HashMap, HashSet};
use wasmtime_environ::entity::EntityRef;
use wasmtime_environ::ir::{StackSlots, ValueLabel, ValueLabelsRanges, ValueLoc};
use wasmtime_environ::isa::{RegUnit, TargetIsa};
use wasmtime_environ::isa::TargetIsa;
use wasmtime_environ::wasm::{get_vmctx_value_label, DefinedFuncIndex};
use wasmtime_environ::ModuleMemoryOffset;
@@ -70,61 +71,6 @@ impl<'a> CompiledExpression<'a> {
}
}
fn map_reg(isa: &dyn TargetIsa, reg: RegUnit) -> Result<Register> {
// TODO avoid duplication with fde.rs
assert!(isa.name() == "x86" && isa.pointer_bits() == 64);
// Mapping from https://github.com/bytecodealliance/cranelift/pull/902 by @iximeow
const X86_GP_REG_MAP: [gimli::Register; 16] = [
X86_64::RAX,
X86_64::RCX,
X86_64::RDX,
X86_64::RBX,
X86_64::RSP,
X86_64::RBP,
X86_64::RSI,
X86_64::RDI,
X86_64::R8,
X86_64::R9,
X86_64::R10,
X86_64::R11,
X86_64::R12,
X86_64::R13,
X86_64::R14,
X86_64::R15,
];
const X86_XMM_REG_MAP: [gimli::Register; 16] = [
X86_64::XMM0,
X86_64::XMM1,
X86_64::XMM2,
X86_64::XMM3,
X86_64::XMM4,
X86_64::XMM5,
X86_64::XMM6,
X86_64::XMM7,
X86_64::XMM8,
X86_64::XMM9,
X86_64::XMM10,
X86_64::XMM11,
X86_64::XMM12,
X86_64::XMM13,
X86_64::XMM14,
X86_64::XMM15,
];
let reg_info = isa.register_info();
let bank = reg_info.bank_containing_regunit(reg).unwrap();
match bank.name {
"IntRegs" => {
// x86 GP registers have a weird mapping to DWARF registers, so we use a
// lookup table.
Ok(X86_GP_REG_MAP[(reg - bank.first_unit) as usize])
}
"FloatRegs" => Ok(X86_XMM_REG_MAP[(reg - bank.first_unit) as usize]),
bank_name => {
bail!("unsupported register bank: {}", bank_name);
}
}
}
fn translate_loc(
loc: ValueLoc,
frame_info: Option<&FunctionFrameInfo>,