arm32 codegen

This commit adds arm32 code generation for some IR insts.
Floating-point instructions are not supported, because regalloc
does not allow to represent overlapping register classes,
which are needed by VFP/Neon.

There is also no support for big-endianness, I64 and I128 types.

cranelift/codegen/src/isa/x64/abi.rs

@@ -59,6 +59,10 @@ pub(crate) struct X64ABIMachineSpec;
 impl ABIMachineSpec for X64ABIMachineSpec {
     type I = Inst;
 
+    fn word_bits() -> u32 {
+        64
+    }
+
     fn compute_arg_locs(
         call_conv: isa::CallConv,
         params: &[ir::AbiParam],