[meta] Generate the binemits files;
Co-authored-by: Benjamin Bouvier <public@benj.me> Co-authored-by: bjorn3 <bjorn3@users.noreply.github.com>
This commit is contained in:
Benjamin Bouvier
224
cranelift/codegen/meta/src/gen_binemit.rs
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224
cranelift/codegen/meta/src/gen_binemit.rs
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@@ -0,0 +1,224 @@
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//! Generate binary emission code for each ISA.
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use cranelift_entity::EntityRef;
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use crate::error;
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use crate::srcgen::Formatter;
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use crate::cdsl::formats::FormatRegistry;
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use crate::cdsl::recipes::{EncodingRecipe, OperandConstraint, Recipes};
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/// Generate code to handle a single recipe.
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///
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/// - Unpack the instruction data, knowing the format.
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/// - Determine register locations for operands with register constraints.
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/// - Determine stack slot locations for operands with stack constraints.
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/// - Call hand-written code for the actual emission.
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fn gen_recipe(formats: &FormatRegistry, recipe: &EncodingRecipe, fmt: &mut Formatter) {
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let inst_format = formats.get(recipe.format);
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let num_value_ops = inst_format.num_value_operands;
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let want_args = recipe.operands_in.iter().any(|c| match c {
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OperandConstraint::RegClass(_) | OperandConstraint::Stack(_) => true,
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OperandConstraint::FixedReg(_) | OperandConstraint::TiedInput(_) => false,
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});
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assert!(!want_args || num_value_ops > 0 || inst_format.has_value_list);
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let want_outs = recipe.operands_out.iter().any(|c| match c {
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OperandConstraint::RegClass(_) | OperandConstraint::Stack(_) => true,
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OperandConstraint::FixedReg(_) | OperandConstraint::TiedInput(_) => false,
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});
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let is_regmove = ["RegMove", "RegSpill", "RegFill"].contains(&inst_format.name);
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// Unpack the instruction data.
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fmtln!(fmt, "if let InstructionData::{} {{", inst_format.name);
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fmt.indent(|fmt| {
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fmt.line("opcode,");
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for f in &inst_format.imm_fields {
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fmtln!(fmt, "{},", f.member);
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}
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if want_args {
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if inst_format.has_value_list || num_value_ops > 1 {
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fmt.line("ref args,");
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} else {
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fmt.line("arg,");
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}
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}
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fmt.line("..");
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fmt.outdented_line("} = func.dfg[inst] {");
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// Pass recipe arguments in this order: inputs, imm_fields, outputs.
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let mut args = String::new();
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if want_args && !is_regmove {
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if inst_format.has_value_list {
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fmt.line("let args = args.as_slice(&func.dfg.value_lists);");
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} else if num_value_ops == 1 {
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fmt.line("let args = [arg];");
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}
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args += &unwrap_values(&recipe.operands_in, "in", "args", fmt);
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}
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for f in &inst_format.imm_fields {
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args += &format!(", {}", f.member);
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}
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// Unwrap interesting output arguments.
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if want_outs {
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if recipe.operands_out.len() == 1 {
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fmt.line("let results = [func.dfg.first_result(inst)];")
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} else {
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fmt.line("let results = func.dfg.inst_results(inst);");
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}
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args += &unwrap_values(&recipe.operands_out, "out", "results", fmt);
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}
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// Special handling for regmove instructions. Update the register
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// diversion tracker
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match &*inst_format.name {
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"RegMove" => fmt.line("divert.regmove(arg, src, dst);"),
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"RegSpill" => fmt.line("divert.regspill(arg, src, dst);"),
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"RegFill" => fmt.line("divert.regfill(arg, src, dst);"),
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_ => {}
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}
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match &recipe.emit {
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Some(emit) => {
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fmt.multi_line(emit);
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fmt.line("return;");
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}
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None => {
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fmtln!(
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fmt,
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"return recipe_{}(func, inst, sink, bits{});",
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recipe.name.to_lowercase(),
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args
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);
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}
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}
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});
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fmt.line("}");
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}
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/// Emit code that unwraps values living in registers or stack slots.
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///
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/// :param args: Input or output constraints.
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/// :param prefix: Prefix to be used for the generated local variables.
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/// :param values: Name of slice containing the values to be unwrapped.
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/// :returns: Comma separated list of the generated variables
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fn unwrap_values(
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args: &[OperandConstraint],
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prefix: &str,
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values_slice: &str,
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fmt: &mut Formatter,
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) -> String {
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let mut varlist = String::new();
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for (i, cst) in args.iter().enumerate() {
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match cst {
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OperandConstraint::RegClass(_reg_class) => {
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let v = format!("{}_reg{}", prefix, i);
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varlist += &format!(", {}", v);
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fmtln!(
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fmt,
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"let {} = divert.reg({}[{}], &func.locations);",
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v,
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values_slice,
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i
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);
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}
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OperandConstraint::Stack(stack) => {
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let v = format!("{}_stk{}", prefix, i);
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varlist += &format!(", {}", v);
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fmtln!(fmt, "let {} = StackRef::masked(", v);
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fmt.indent(|fmt| {
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fmtln!(
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fmt,
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"divert.stack({}[{}], &func.locations),",
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values_slice,
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i
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);
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fmt.line(format!("{}, ", stack.stack_base_mask()));
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fmt.line("&func.stack_slots,");
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});
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fmt.line(").unwrap();");
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}
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_ => {}
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}
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}
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varlist
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}
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fn gen_isa(formats: &FormatRegistry, isa_name: &str, recipes: &Recipes, fmt: &mut Formatter) {
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fmt.doc_comment(format!(
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"Emit binary machine code for `inst` for the {} ISA.",
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isa_name
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));
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if recipes.is_empty() {
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fmt.line("pub fn emit_inst<CS: CodeSink + ?Sized>(");
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fmt.indent(|fmt| {
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fmt.line("func: &Function,");
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fmt.line("inst: Inst,");
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fmt.line("_divert: &mut RegDiversions,");
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fmt.line("_sink: &mut CS,");
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});
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fmt.line(") {");
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fmt.indent(|fmt| {
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// No encoding recipes: Emit a stub.
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fmt.line("bad_encoding(func, inst)");
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});
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fmt.line("}");
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return;
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}
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fmt.line("#[allow(unused_variables, unreachable_code)]");
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fmt.line("pub fn emit_inst<CS: CodeSink + ?Sized>(");
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fmt.indent(|fmt| {
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fmt.line("func: &Function,");
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fmt.line("inst: Inst,");
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fmt.line("divert: &mut RegDiversions,");
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fmt.line("sink: &mut CS,");
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});
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fmt.line(") {");
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fmt.indent(|fmt| {
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fmt.line("let encoding = func.encodings[inst];");
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fmt.line("let bits = encoding.bits();");
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fmt.line("match func.encodings[inst].recipe() {");
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fmt.indent(|fmt| {
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for (i, recipe) in recipes.iter() {
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fmt.comment(format!("Recipe {}", recipe.name));
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fmtln!(fmt, "{} => {{", i.index());
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fmt.indent(|fmt| {
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gen_recipe(formats, recipe, fmt);
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});
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fmt.line("}");
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}
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fmt.line("_ => {},");
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});
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fmt.line("}");
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// Allow for unencoded ghost instructions. The verifier will check details.
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fmt.line("if encoding.is_legal() {");
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fmt.indent(|fmt| {
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fmt.line("bad_encoding(func, inst);");
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});
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fmt.line("}");
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});
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fmt.line("}");
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}
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pub fn generate(
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formats: &FormatRegistry,
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isa_name: &str,
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recipes: &Recipes,
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binemit_filename: &str,
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out_dir: &str,
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) -> Result<(), error::Error> {
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let mut fmt = Formatter::new();
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gen_isa(formats, isa_name, recipes, &mut fmt);
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fmt.update_file(binemit_filename, out_dir)?;
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Ok(())
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}
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@@ -5,6 +5,7 @@ mod srcgen;
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pub mod error;
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pub mod isa;
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mod gen_binemit;
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mod gen_inst;
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mod gen_legalizer;
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mod gen_registers;
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@@ -48,12 +49,21 @@ pub fn generate(isas: &Vec<isa::Isa>, out_dir: &str) -> Result<(), error::Error>
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for isa in isas {
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gen_registers::generate(&isa, &format!("registers-{}.rs", isa.name), &out_dir)?;
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gen_settings::generate(
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&isa.settings,
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gen_settings::ParentGroup::Shared,
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&format!("settings-{}.rs", isa.name),
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&out_dir,
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)?;
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gen_binemit::generate(
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&shared_defs.format_registry,
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&isa.name,
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&isa.recipes,
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&format!("binemit-{}.rs", isa.name),
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&out_dir,
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)?;
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}
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Ok(())
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