Rename Cretonne to Cranelift!

lib/codegen/src/binemit/memorysink.rs

@@ -1,6 +1,6 @@
 //! Code sink that writes binary machine code into contiguous memory.
 //!
-//! The `CodeSink` trait is the most general way of extracting binary machine code from Cretonne,
+//! The `CodeSink` trait is the most general way of extracting binary machine code from Cranelift,
 //! and it is implemented by things like the `test binemit` file test driver to generate
 //! hexadecimal machine code. The `CodeSink` has some undesirable performance properties because of
 //! the dual abstraction: `TargetIsa` is a trait object implemented by each supported ISA, so it
@@ -20,7 +20,7 @@ use std::ptr::write_unaligned;
 
 /// A `CodeSink` that writes binary machine code directly into memory.
 ///
-/// A `MemoryCodeSink` object should be used when emitting a Cretonne IR function into executable
+/// A `MemoryCodeSink` object should be used when emitting a Cranelift IR function into executable
 /// memory. It writes machine code directly to a raw pointer without any bounds checking, so make
 /// sure to allocate enough memory for the whole function. The number of bytes required is returned
 /// by the `Context::compile()` function.

lib/codegen/src/binemit/mod.rs

@@ -1,6 +1,6 @@
 //! Binary machine code emission.
 //!
-//! The `binemit` module contains code for translating Cretonne's intermediate representation into
+//! The `binemit` module contains code for translating Cranelift's intermediate representation into
 //! binary machine code.
 
 mod memorysink;
@@ -17,7 +17,7 @@ use std::fmt;
 
 /// Offset in bytes from the beginning of the function.
 ///
-/// Cretonne can be used as a cross compiler, so we don't want to use a type like `usize` which
+/// Cranelift can be used as a cross compiler, so we don't want to use a type like `usize` which
 /// depends on the *host* platform, not the *target* platform.
 pub type CodeOffset = u32;
 
@@ -49,7 +49,7 @@ pub enum Reloc {
 
 impl fmt::Display for Reloc {
     /// Display trait implementation drops the arch, since its used in contexts where the arch is
-    /// already unambigious, e.g. cton syntax with isa specified. In other contexts, use Debug.
+    /// already unambigious, e.g. clif syntax with isa specified. In other contexts, use Debug.
     fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
         match *self {
             Reloc::Abs4 => write!(f, "Abs4"),

lib/codegen/src/binemit/relaxation.rs

@@ -15,13 +15,13 @@
 //! On RISC architectures, it can happen that conditional branches have a shorter range than
 //! unconditional branches:
 //!
-//! ```cton
+//! ```clif
 //!     brz v1, ebb17
 //! ```
 //!
 //! can be transformed into:
 //!
-//! ```cton
+//! ```clif
 //!     brnz v1, ebb23
 //!     jump ebb17
 //! ebb23:

lib/codegen/src/binemit/shrink.rs

@@ -1,6 +1,6 @@
 //! Instruction shrinking.
 //!
-//! Sometimes there are multiple valid encodings for a given instruction. Cretonne often initially
+//! Sometimes there are multiple valid encodings for a given instruction. Cranelift often initially
 //! chooses the largest one, because this typically provides the register allocator the most
 //! flexibility. However, once register allocation is done, this is no longer important, and we
 //! can switch to smaller encodings when possible.