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Reduce arm64 Inst enum size

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This reduces the size of the Inst enum from 112 bytes to 48 bytes.

Using DHAT on a regex-rs.wasm benchmark, `valgrind --tool=dhat clif-util compile --target aarch64`

The total number of allocated bytes, drops by around 170 MB.
At t-gmax drops by 3 MB.

Using `perf stat clif-util compile --target aarch64`, the instructions count dropped by 0.6%. Cache misses dropped by 6%. Cycles dropped by 2.3%.
This commit is contained in:
Joey Gouly
2020-05-14 15:45:55 +01:00
parent 5987cf5cda
commit f418b7a700
5 changed files with 41 additions and 31 deletions
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40
cranelift/codegen/src/isa/aarch64/inst/mod.rs
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@@ -12,6 +12,7 @@ use crate::{settings, CodegenError, CodegenResult};
use regalloc::{RealRegUniverse, Reg, RegClass, SpillSlot, VirtualReg, Writable};
use regalloc::{RegUsageCollector, RegUsageMapper, Set};
use alloc::boxed::Box;
use alloc::vec::Vec;
use smallvec::{smallvec, SmallVec};
use std::string::{String, ToString};
@@ -616,17 +617,17 @@ pub enum Inst {
/// code should use a `LoadExtName` / `CallInd` sequence instead, allowing an arbitrary 64-bit
/// target.
Call {
dest: ExternalName,
uses: Set<Reg>,
defs: Set<Writable<Reg>>,
dest: Box<ExternalName>,
uses: Box<Set<Reg>>,
defs: Box<Set<Writable<Reg>>>,
loc: SourceLoc,
opcode: Opcode,
},
/// A machine indirect-call instruction.
CallInd {
rn: Reg,
uses: Set<Reg>,
defs: Set<Writable<Reg>>,
uses: Box<Set<Reg>>,
defs: Box<Set<Writable<Reg>>>,
loc: SourceLoc,
opcode: Opcode,
},
@@ -704,8 +705,8 @@ pub enum Inst {
/// Jump-table sequence, as one compound instruction (see note in lower.rs
/// for rationale).
JTSequence {
targets: Vec<BranchTarget>,
targets_for_term: Vec<BlockIndex>, // needed for MachTerminator.
targets: Box<[BranchTarget]>,
targets_for_term: Box<[BlockIndex]>, // needed for MachTerminator.
ridx: Reg,
rtmp1: Writable<Reg>,
rtmp2: Writable<Reg>,
@@ -760,6 +761,13 @@ fn count_zero_half_words(mut value: u64) -> usize {
count
}
#[test]
fn inst_size_test() {
// This test will help with unintentionally growing the size
// of the Inst enum.
assert_eq!(48, std::mem::size_of::<Inst>());
}
impl Inst {
/// Create a move instruction.
pub fn mov(to_reg: Writable<Reg>, from_reg: Reg) -> Inst {
@@ -1090,8 +1098,8 @@ fn aarch64_get_regs(inst: &Inst, collector: &mut RegUsageCollector) {
&Inst::Call {
ref uses, ref defs, ..
} => {
collector.add_uses(uses);
collector.add_defs(defs);
collector.add_uses(&*uses);
collector.add_defs(&*defs);
}
&Inst::CallInd {
ref uses,
@@ -1099,8 +1107,8 @@ fn aarch64_get_regs(inst: &Inst, collector: &mut RegUsageCollector) {
rn,
..
} => {
collector.add_uses(uses);
collector.add_defs(defs);
collector.add_uses(&*uses);
collector.add_defs(&*defs);
collector.add_use(rn);
}
&Inst::CondBr { ref kind, .. }
@@ -1643,8 +1651,8 @@ fn aarch64_map_regs(inst: &mut Inst, mapper: &RegUsageMapper) {
map_def(mapper, &mut r);
r
});
*uses = new_uses;
*defs = new_defs;
*uses = Box::new(new_uses);
*defs = Box::new(new_defs);
}
&mut Inst::Ret | &mut Inst::EpiloguePlaceholder => {}
&mut Inst::CallInd {
@@ -1664,8 +1672,8 @@ fn aarch64_map_regs(inst: &mut Inst, mapper: &RegUsageMapper) {
map_def(mapper, &mut r);
r
});
*uses = new_uses;
*defs = new_defs;
*uses = Box::new(new_uses);
*defs = Box::new(new_defs);
map_use(mapper, rn);
}
&mut Inst::CondBr { ref mut kind, .. } => {
@@ -1895,7 +1903,7 @@ impl MachInst for Inst {
&mut Inst::JTSequence {
targets: ref mut t, ..
} => {
for target in t {
for target in t.iter_mut() {
// offset+20: jumptable is 20 bytes into compound sequence.
target.lower(targets, my_offset + 20);
}