From f335c5c56c7186cbaa1a9fd52bf9de837e1ef76a Mon Sep 17 00:00:00 2001 From: Benjamin Bouvier Date: Tue, 16 Apr 2019 15:20:18 +0200 Subject: [PATCH] [meta] Small fixes in the settings generation; --- cranelift/codegen/meta/src/gen_settings.rs | 22 ++++++--------------- cranelift/codegen/meta/src/isa/riscv/mod.rs | 2 +- cranelift/codegen/meta/src/isa/x86/mod.rs | 2 ++ cranelift/codegen/meta/src/lib.rs | 2 +- 4 files changed, 10 insertions(+), 18 deletions(-) diff --git a/cranelift/codegen/meta/src/gen_settings.rs b/cranelift/codegen/meta/src/gen_settings.rs index b57e7a4f51..0238ef1ec6 100644 --- a/cranelift/codegen/meta/src/gen_settings.rs +++ b/cranelift/codegen/meta/src/gen_settings.rs @@ -288,7 +288,8 @@ fn gen_descriptors(group: &SettingGroup, fmt: &mut Formatter) { }); fmtln!(fmt, "},"); - descriptor_index_map.insert(SettingOrPreset::Preset(preset), idx); + let whole_idx = idx + group.settings.len(); + descriptor_index_map.insert(SettingOrPreset::Preset(preset), whole_idx); } }); fmtln!(fmt, "];"); @@ -304,20 +305,9 @@ fn gen_descriptors(group: &SettingGroup, fmt: &mut Formatter) { // Generate hash table. let mut hash_entries: Vec = Vec::new(); - hash_entries.extend( - group - .settings - .iter() - .map(|x| SettingOrPreset::Setting(x)) - .collect::>(), - ); - hash_entries.extend( - group - .presets - .iter() - .map(|x| SettingOrPreset::Preset(x)) - .collect::>(), - ); + hash_entries.extend(group.settings.iter().map(|x| SettingOrPreset::Setting(x))); + hash_entries.extend(group.presets.iter().map(|x| SettingOrPreset::Preset(x))); + let hash_table = generate_table(&hash_entries, |entry| simple_hash(entry.name())); fmtln!(fmt, "static HASH_TABLE: [u16; {}] = [", hash_table.len()); fmt.indent(|fmt| { @@ -341,7 +331,7 @@ fn gen_descriptors(group: &SettingGroup, fmt: &mut Formatter) { fmtln!( fmt, "static PRESETS: [(u8, u8); {}] = [", - group.presets.len() + group.presets.len() * (group.settings_size as usize) ); fmt.indent(|fmt| { for preset in &group.presets { diff --git a/cranelift/codegen/meta/src/isa/riscv/mod.rs b/cranelift/codegen/meta/src/isa/riscv/mod.rs index 4e947d3184..a900f07005 100644 --- a/cranelift/codegen/meta/src/isa/riscv/mod.rs +++ b/cranelift/codegen/meta/src/isa/riscv/mod.rs @@ -41,7 +41,7 @@ fn define_settings(shared: &SettingGroup) -> SettingGroup { setting.add_bool( "enable_e", "Enable the 'RV32E' instruction set with only 16 registers", - true, + false, ); let shared_enable_atomics = shared.get_bool("enable_atomics"); diff --git a/cranelift/codegen/meta/src/isa/x86/mod.rs b/cranelift/codegen/meta/src/isa/x86/mod.rs index c0a35a8e1d..861553bf88 100644 --- a/cranelift/codegen/meta/src/isa/x86/mod.rs +++ b/cranelift/codegen/meta/src/isa/x86/mod.rs @@ -65,6 +65,8 @@ fn define_settings(shared: &SettingGroup) -> SettingGroup { predicate!(!allones_funcaddrs && !is_pic), ); + // Presets corresponding to x86 CPUs. + settings.add_preset("baseline", preset!()); let nehalem = settings.add_preset( "nehalem", diff --git a/cranelift/codegen/meta/src/lib.rs b/cranelift/codegen/meta/src/lib.rs index 4663a29131..2dff027076 100644 --- a/cranelift/codegen/meta/src/lib.rs +++ b/cranelift/codegen/meta/src/lib.rs @@ -59,7 +59,7 @@ pub fn generate(isas: &Vec, out_dir: &str) -> Result<(), error::Error> gen_settings::generate( &isa.settings, gen_settings::ParentGroup::Shared, - &format!("new_settings-{}", isa.name), + &format!("new_settings-{}.rs", isa.name), &out_dir, )?; }