Convert sqrt..nearest to ISLE (AArch64) (#4508)

Converted the existing implementations for the following opcodes to ISLE
on AArch64:
- `sqrt`
- `fneg`
- `fabs`
- `fpromote`
- `fdemote`
- `ceil`
- `floor`
- `trunc`
- `nearest`

Copyright (c) 2022 Arm Limited

cranelift/codegen/src/isa/aarch64/inst/emit_tests.rs

@@ -4426,6 +4426,17 @@ fn test_aarch64_binemit() {
         "abs v1.2d, v10.2d",
     ));
 
+    insns.push((
+        Inst::VecMisc {
+            op: VecMisc2::Fabs,
+            rd: writable_vreg(15),
+            rn: vreg(16),
+            size: VectorSize::Size32x2,
+        },
+        "0FFAA00E",
+        "fabs v15.2s, v16.2s",
+    ));
+
     insns.push((
         Inst::VecMisc {
             op: VecMisc2::Fabs,
@@ -4448,6 +4459,17 @@ fn test_aarch64_binemit() {
         "fabs v3.2d, v22.2d",
     ));
 
+    insns.push((
+        Inst::VecMisc {
+            op: VecMisc2::Fneg,
+            rd: writable_vreg(31),
+            rn: vreg(0),
+            size: VectorSize::Size32x2,
+        },
+        "1FF8A02E",
+        "fneg v31.2s, v0.2s",
+    ));
+
     insns.push((
         Inst::VecMisc {
             op: VecMisc2::Fneg,
@@ -4481,6 +4503,17 @@ fn test_aarch64_binemit() {
         "fsqrt v18.2s, v25.2s",
     ));
 
+    insns.push((
+        Inst::VecMisc {
+            op: VecMisc2::Fsqrt,
+            rd: writable_vreg(18),
+            rn: vreg(25),
+            size: VectorSize::Size32x4,
+        },
+        "32FBA16E",
+        "fsqrt v18.4s, v25.4s",
+    ));
+
     insns.push((
         Inst::VecMisc {
             op: VecMisc2::Fsqrt,