Cranelift: Implement iadd_cout on x64 for 32- and 64-bit integers (#5285)

* Split the `iadd_cout` runtests by type

* Implement `iadd_cout` for 32- and 64-bit values on x64

* Delete trailing whitespace in `riscv/lower.isle`

cranelift/codegen/src/isa/x64/inst.isle

@@ -2124,6 +2124,15 @@
          (MInst.Setcc cc dst)
          dst)))
 
+;; Helper for creating `MInst.Setcc` instructions, when the flags producer will
+;; also return a value.
+(decl x64_setcc_paired (CC) ConsumesFlags)
+(rule (x64_setcc_paired cc)
+      (let ((dst WritableGpr (temp_writable_gpr)))
+        (ConsumesFlags.ConsumesFlagsReturnsResultWithProducer
+         (MInst.Setcc cc dst)
+         dst)))
+
 ;; Helper for creating `MInst.XmmRmR` instructions.
 (decl xmm_rm_r (Type SseOpcode Xmm XmmMem) Xmm)
 (rule (xmm_rm_r ty op src1 src2)

cranelift/codegen/src/isa/x64/lower.isle

@@ -102,6 +102,19 @@
           (with_flags (x64_add_with_flags_paired $I64 x_lo y_lo)
                       (x64_adc_paired $I64 x_hi y_hi)))))
 
+;;;; Rules for `iadd_cout` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;; TODO: i8 and i16 support. Requires either learning how to encode ALU
+;; operations on values narrower than 32-bits (better code; big change) or doing
+;; the same extend-to-32-bits trick that aarch64 does (worse code; small
+;; change).
+
+(rule (lower (iadd_cout x y @ (value_type (ty_32_or_64 ty))))
+      (let ((results ValueRegs (with_flags (x64_add_with_flags_paired ty x y)
+                                           (x64_setcc_paired (CC.O)))))
+        (output_pair (value_regs_get results 0)
+                     (value_regs_get results 1))))
+
 ;;;; Rules for `sadd_sat` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 (rule (lower (has_type (multi_lane 8 16)

cranelift/codegen/src/isa/x64/lower.rs

@@ -331,6 +331,7 @@ fn lower_insn_to_regs(
         | Opcode::F64const
         | Opcode::Null
         | Opcode::Iadd
+        | Opcode::IaddCout
         | Opcode::IaddIfcout
         | Opcode::SaddSat
         | Opcode::UaddSat
@@ -515,7 +516,6 @@ fn lower_insn_to_regs(
         | Opcode::IrsubImm
         | Opcode::IaddCin
         | Opcode::IaddIfcin
-        | Opcode::IaddCout
         | Opcode::IaddCarry
         | Opcode::IaddIfcarry
         | Opcode::IsubBin

cranelift/filetests/filetests/runtests/iaddcout-i16.clif

@@ -0,0 +1,29 @@
+test interpret
+test run
+target aarch64
+; target s390x
+; target x86_64
+; target riscv64
+
+function %iaddcout_i16_v(i16, i16) -> i16 {
+block0(v0: i16, v1: i16):
+    v2, v3 = iadd_cout v0, v1
+    return v2
+}
+; run: %iaddcout_i16_v(0, 1) == 1
+; run: %iaddcout_i16_v(100, 27) == 127
+; run: %iaddcout_i16_v(100, 28) == 128
+; run: %iaddcout_i16_v(32000, 767) == 32767
+; run: %iaddcout_i16_v(32000, 768) == -32768
+
+function %iaddcout_i16_c(i16, i16) -> i8 {
+block0(v0: i16, v1: i16):
+    v2, v3 = iadd_cout v0, v1
+    return v3
+}
+; run: %iaddcout_i16_c(0, 1) == 0
+; run: %iaddcout_i16_c(100, 27) == 0
+; run: %iaddcout_i16_c(100, 28) == 0
+; run: %iaddcout_i16_c(32000, 767) == 0
+; run: %iaddcout_i16_c(32000, 768) == 1
+

cranelift/filetests/filetests/runtests/iaddcout-i32.clif

@@ -0,0 +1,29 @@
+test interpret
+test run
+target aarch64
+; target s390x
+target x86_64
+; target riscv64
+
+function %iaddcout_i32_v(i32, i32) -> i32 {
+block0(v0: i32, v1: i32):
+    v2, v3 = iadd_cout v0, v1
+    return v2
+}
+; run: %iaddcout_i32_v(0, 1) == 1
+; run: %iaddcout_i32_v(100, 27) == 127
+; run: %iaddcout_i32_v(100, 28) == 128
+; run: %iaddcout_i32_v(2000000000, 147483647) == 2147483647
+; run: %iaddcout_i32_v(2000000000, 147483648) == -2147483648
+
+function %iaddcout_i32_c(i32, i32) -> i8 {
+block0(v0: i32, v1: i32):
+    v2, v3 = iadd_cout v0, v1
+    return v3
+}
+; run: %iaddcout_i32_c(0, 1) == 0
+; run: %iaddcout_i32_c(100, 27) == 0
+; run: %iaddcout_i32_c(100, 28) == 0
+; run: %iaddcout_i32_c(2000000000, 147483647) == 0
+; run: %iaddcout_i32_c(2000000000, 147483648) == 1
+

cranelift/filetests/filetests/runtests/iaddcout-i64.clif

@@ -0,0 +1,28 @@
+test interpret
+test run
+target aarch64
+; target s390x
+target x86_64
+; target riscv64
+
+function %iaddcout_i64_v(i64, i64) -> i64 {
+block0(v0: i64, v1: i64):
+    v2, v3 = iadd_cout v0, v1
+    return v2
+}
+; run: %iaddcout_i64_v(0, 1) == 1
+; run: %iaddcout_i64_v(100, 27) == 127
+; run: %iaddcout_i64_v(100, 28) == 128
+; run: %iaddcout_i64_v(0x7FFFFFFF_FFFF0000, 0xFFFF) == 0x7FFFFFFF_FFFFFFFF
+; run: %iaddcout_i64_v(0x7FFFFFFF_FFFF0000, 0x10000) == 0x80000000_00000000
+
+function %iaddcout_i64_c(i64, i64) -> i8 {
+block0(v0: i64, v1: i64):
+    v2, v3 = iadd_cout v0, v1
+    return v3
+}
+; run: %iaddcout_i64_c(0, 1) == 0
+; run: %iaddcout_i64_c(100, 27) == 0
+; run: %iaddcout_i64_c(100, 28) == 0
+; run: %iaddcout_i64_c(0x7FFFFFFF_FFFF0000, 0xFFFF) == 0
+; run: %iaddcout_i64_c(0x7FFFFFFF_FFFF0000, 0x10000) == 1

cranelift/filetests/filetests/runtests/iaddcout-i8.clif

@@ -0,0 +1,29 @@
+test interpret
+test run
+target aarch64
+; target s390x
+; target x86_64
+; target riscv64
+
+function %iaddcout_i8_v(i8, i8) -> i8 {
+block0(v0: i8, v1: i8):
+    v2, v3 = iadd_cout v0, v1
+    return v2
+}
+; run: %iaddcout_i8_v(0, 1) == 1
+; run: %iaddcout_i8_v(100, 27) == 127
+; run: %iaddcout_i8_v(100, -20) == 80
+; run: %iaddcout_i8_v(100, 28) == -128
+; run: %iaddcout_i8_v(-128, -128) == 0
+
+function %iaddcout_i8_c(i8, i8) -> i8 {
+block0(v0: i8, v1: i8):
+    v2, v3 = iadd_cout v0, v1
+    return v3
+}
+; run: %iaddcout_i8_c(0, 1) == 0
+; run: %iaddcout_i8_c(100, 27) == 0
+; run: %iaddcout_i8_c(100, -20) == 0
+; run: %iaddcout_i8_c(100, 28) == 1
+; run: %iaddcout_i8_c(-128, -128) == 1
+

cranelift/filetests/filetests/runtests/iaddcout.clif

@@ -1,94 +0,0 @@
-test interpret
-test run
-target aarch64
-; target s390x
-; target x86_64
-; target riscv64
-
-function %iaddcout_i8_v(i8, i8) -> i8 {
-block0(v0: i8, v1: i8):
-    v2, v3 = iadd_cout v0, v1
-    return v2
-}
-; run: %iaddcout_i8_v(0, 1) == 1
-; run: %iaddcout_i8_v(100, 27) == 127
-; run: %iaddcout_i8_v(100, -20) == 80
-; run: %iaddcout_i8_v(100, 28) == -128
-; run: %iaddcout_i8_v(-128, -128) == 0
-
-function %iaddcout_i8_c(i8, i8) -> i8 {
-block0(v0: i8, v1: i8):
-    v2, v3 = iadd_cout v0, v1
-    return v3
-}
-; run: %iaddcout_i8_c(0, 1) == 0
-; run: %iaddcout_i8_c(100, 27) == 0
-; run: %iaddcout_i8_c(100, -20) == 0
-; run: %iaddcout_i8_c(100, 28) == 1
-; run: %iaddcout_i8_c(-128, -128) == 1
-
-function %iaddcout_i16_v(i16, i16) -> i16 {
-block0(v0: i16, v1: i16):
-    v2, v3 = iadd_cout v0, v1
-    return v2
-}
-; run: %iaddcout_i16_v(0, 1) == 1
-; run: %iaddcout_i16_v(100, 27) == 127
-; run: %iaddcout_i16_v(100, 28) == 128
-; run: %iaddcout_i16_v(32000, 767) == 32767
-; run: %iaddcout_i16_v(32000, 768) == -32768
-
-function %iaddcout_i16_c(i16, i16) -> i8 {
-block0(v0: i16, v1: i16):
-    v2, v3 = iadd_cout v0, v1
-    return v3
-}
-; run: %iaddcout_i16_c(0, 1) == 0
-; run: %iaddcout_i16_c(100, 27) == 0
-; run: %iaddcout_i16_c(100, 28) == 0
-; run: %iaddcout_i16_c(32000, 767) == 0
-; run: %iaddcout_i16_c(32000, 768) == 1
-
-function %iaddcout_i32_v(i32, i32) -> i32 {
-block0(v0: i32, v1: i32):
-    v2, v3 = iadd_cout v0, v1
-    return v2
-}
-; run: %iaddcout_i32_v(0, 1) == 1
-; run: %iaddcout_i32_v(100, 27) == 127
-; run: %iaddcout_i32_v(100, 28) == 128
-; run: %iaddcout_i32_v(2000000000, 147483647) == 2147483647
-; run: %iaddcout_i32_v(2000000000, 147483648) == -2147483648
-
-function %iaddcout_i32_c(i32, i32) -> i8 {
-block0(v0: i32, v1: i32):
-    v2, v3 = iadd_cout v0, v1
-    return v3
-}
-; run: %iaddcout_i32_c(0, 1) == 0
-; run: %iaddcout_i32_c(100, 27) == 0
-; run: %iaddcout_i32_c(100, 28) == 0
-; run: %iaddcout_i32_c(2000000000, 147483647) == 0
-; run: %iaddcout_i32_c(2000000000, 147483648) == 1
-
-function %iaddcout_i64_v(i64, i64) -> i64 {
-block0(v0: i64, v1: i64):
-    v2, v3 = iadd_cout v0, v1
-    return v2
-}
-; run: %iaddcout_i64_v(0, 1) == 1
-; run: %iaddcout_i64_v(100, 27) == 127
-; run: %iaddcout_i64_v(100, 28) == 128
-; run: %iaddcout_i64_v(0x7FFFFFFF_FFFF0000, 0xFFFF) == 0x7FFFFFFF_FFFFFFFF
-; run: %iaddcout_i64_v(0x7FFFFFFF_FFFF0000, 0x10000) == 0x80000000_00000000
-
-function %iaddcout_i64_c(i64, i64) -> i8 {
-block0(v0: i64, v1: i64):
-    v2, v3 = iadd_cout v0, v1
-    return v3
-}
-; run: %iaddcout_i64_c(0, 1) == 0
-; run: %iaddcout_i64_c(100, 27) == 0
-; run: %iaddcout_i64_c(100, 28) == 0
-; run: %iaddcout_i64_c(0x7FFFFFFF_FFFF0000, 0xFFFF) == 0
-; run: %iaddcout_i64_c(0x7FFFFFFF_FFFF0000, 0x10000) == 1