Cranelift: Implement iadd_cout on x64 for 32- and 64-bit integers (#5285)

* Split the `iadd_cout` runtests by type

* Implement `iadd_cout` for 32- and 64-bit values on x64

* Delete trailing whitespace in `riscv/lower.isle`
This commit is contained in:
Nick Fitzgerald
2022-12-07 11:54:14 -08:00
committed by GitHub
parent 7f53525ad9
commit f0c4b6f3a1
9 changed files with 283 additions and 240 deletions

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@@ -2124,6 +2124,15 @@
(MInst.Setcc cc dst)
dst)))
;; Helper for creating `MInst.Setcc` instructions, when the flags producer will
;; also return a value.
(decl x64_setcc_paired (CC) ConsumesFlags)
(rule (x64_setcc_paired cc)
(let ((dst WritableGpr (temp_writable_gpr)))
(ConsumesFlags.ConsumesFlagsReturnsResultWithProducer
(MInst.Setcc cc dst)
dst)))
;; Helper for creating `MInst.XmmRmR` instructions.
(decl xmm_rm_r (Type SseOpcode Xmm XmmMem) Xmm)
(rule (xmm_rm_r ty op src1 src2)

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@@ -102,6 +102,19 @@
(with_flags (x64_add_with_flags_paired $I64 x_lo y_lo)
(x64_adc_paired $I64 x_hi y_hi)))))
;;;; Rules for `iadd_cout` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; TODO: i8 and i16 support. Requires either learning how to encode ALU
;; operations on values narrower than 32-bits (better code; big change) or doing
;; the same extend-to-32-bits trick that aarch64 does (worse code; small
;; change).
(rule (lower (iadd_cout x y @ (value_type (ty_32_or_64 ty))))
(let ((results ValueRegs (with_flags (x64_add_with_flags_paired ty x y)
(x64_setcc_paired (CC.O)))))
(output_pair (value_regs_get results 0)
(value_regs_get results 1))))
;;;; Rules for `sadd_sat` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
(rule (lower (has_type (multi_lane 8 16)

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@@ -331,6 +331,7 @@ fn lower_insn_to_regs(
| Opcode::F64const
| Opcode::Null
| Opcode::Iadd
| Opcode::IaddCout
| Opcode::IaddIfcout
| Opcode::SaddSat
| Opcode::UaddSat
@@ -515,7 +516,6 @@ fn lower_insn_to_regs(
| Opcode::IrsubImm
| Opcode::IaddCin
| Opcode::IaddIfcin
| Opcode::IaddCout
| Opcode::IaddCarry
| Opcode::IaddIfcarry
| Opcode::IsubBin