diff --git a/cranelift/filetests/isa/intel/binary32-float.cton b/cranelift/filetests/isa/intel/binary32-float.cton index 3116207a24..9b12506b80 100644 --- a/cranelift/filetests/isa/intel/binary32-float.cton +++ b/cranelift/filetests/isa/intel/binary32-float.cton @@ -1,6 +1,6 @@ ; Binary emission of 32-bit floating point code. test binemit -isa intel has_sse2 +isa intel haswell ; The binary encodings can be verified with the command: ; @@ -52,7 +52,7 @@ ebb0: ; asm: addss %xmm2, %xmm5 [-,%xmm5] v20 = fadd v10, v11 ; bin: f3 0f 58 ea ; asm: addss %xmm5, %xmm2 - [-,%xmm2] v21 = fadd v11, v10 ; bin: f3 0f 58 d5 + [-,%xmm2] v21 = fadd v11, v10 ; bin: f3 0f 58 d5 ; asm: subss %xmm2, %xmm5 [-,%xmm5] v22 = fsub v10, v11 ; bin: f3 0f 5c ea @@ -267,7 +267,7 @@ ebb0: ; asm: addsd %xmm2, %xmm5 [-,%xmm5] v20 = fadd v10, v11 ; bin: f2 0f 58 ea ; asm: addsd %xmm5, %xmm2 - [-,%xmm2] v21 = fadd v11, v10 ; bin: f2 0f 58 d5 + [-,%xmm2] v21 = fadd v11, v10 ; bin: f2 0f 58 d5 ; asm: subsd %xmm2, %xmm5 [-,%xmm5] v22 = fsub v10, v11 ; bin: f2 0f 5c ea diff --git a/cranelift/filetests/isa/intel/binary64-float.cton b/cranelift/filetests/isa/intel/binary64-float.cton index 86a6247b2e..8ca4efd8d8 100644 --- a/cranelift/filetests/isa/intel/binary64-float.cton +++ b/cranelift/filetests/isa/intel/binary64-float.cton @@ -2,7 +2,7 @@ test binemit set is_64bit set is_compressed -isa intel has_sse2 +isa intel haswell ; The binary encodings can be verified with the command: ; diff --git a/lib/cretonne/meta/gen_encoding.py b/lib/cretonne/meta/gen_encoding.py index 283b9d1e0d..46fe22a913 100644 --- a/lib/cretonne/meta/gen_encoding.py +++ b/lib/cretonne/meta/gen_encoding.py @@ -169,15 +169,19 @@ def emit_recipe_predicates(isa, fmt): # Generate the predicate function. with fmt.indented( 'fn {}({}: ::settings::PredicateView, ' - 'inst: &ir::InstructionData) -> bool {{' + '{}: &ir::InstructionData) -> bool {{' .format( name, - 'isap' if isap else '_'), '}'): + 'isap' if isap else '_', + 'inst' if instp else '_'), '}'): if isap: n = isa.settings.predicate_number[isap] - with fmt.indented('if isap.test({})'.format(n), '}'): + with fmt.indented('if !isap.test({}) {{'.format(n), '}'): fmt.line('return false;') - emit_instp(instp, fmt) + if instp: + emit_instp(instp, fmt) + else: + fmt.line('true') # Generate the static table. with fmt.indented( diff --git a/lib/cretonne/meta/isa/intel/recipes.py b/lib/cretonne/meta/isa/intel/recipes.py index e4ae7c74c4..a970b342aa 100644 --- a/lib/cretonne/meta/isa/intel/recipes.py +++ b/lib/cretonne/meta/isa/intel/recipes.py @@ -13,6 +13,7 @@ from base.formats import Ternary, FuncAddr, UnaryGlobalVar from base.formats import RegMove, RegSpill, RegFill, CopySpecial from .registers import GPR, ABCD, FPR, GPR8, FPR8, FLAG, StackGPR32, StackFPR32 from .defs import supported_floatccs +from .settings import use_sse41 try: from typing import Tuple, Dict, Sequence, Any # noqa @@ -372,6 +373,7 @@ rfurm = TailRecipe( # XX /r, RMI form for one of the roundXX SSE 4.1 instructions. furmi_rnd = TailRecipe( 'furmi_rnd', Unary, size=2, ins=FPR, outs=FPR, + isap=use_sse41, emit=''' PUT_OP(bits, rex2(in_reg0, out_reg0), sink); modrm_rr(in_reg0, out_reg0, sink);