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Add Intel encodings for jump and branch instructions.

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Just implement jump, brz, and brnz as needed for WebAssembly.
This commit is contained in:
Jakob Stoklund Olesen
2017-07-18 14:54:34 -07:00
parent 53d9232d39
commit efdbf0d735
6 changed files with 188 additions and 2 deletions
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18
lib/cretonne/meta/isa/intel/encodings.py
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@@ -156,3 +156,21 @@ I32.enc(base.call, *r.call_id(0xe8))
I32.enc(base.call_indirect.i32, *r.call_r(0xff, rrr=2))
I32.enc(base.x_return, *r.ret(0xc3))
I64.enc(base.x_return, *r.ret(0xc3))
#
# Branches
#
I32.enc(base.jump, *r.jmpb(0xeb))
I32.enc(base.jump, *r.jmpd(0xe9))
I64.enc(base.jump, *r.jmpb(0xeb))
I64.enc(base.jump, *r.jmpd(0xe9))
I32.enc(base.brz.i32, *r.tjccb(0x74))
I64.enc(base.brz.i64, *r.tjccb.rex(0x74, w=1))
I64.enc(base.brz.i32, *r.tjccb.rex(0x74))
I64.enc(base.brz.i32, *r.tjccb(0x74))
I32.enc(base.brnz.i32, *r.tjccb(0x75))
I64.enc(base.brnz.i64, *r.tjccb.rex(0x75, w=1))
I64.enc(base.brnz.i32, *r.tjccb.rex(0x75))
I64.enc(base.brnz.i32, *r.tjccb(0x75))