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x64: Port func_addr and symbol_value to ISLE (#4485)

Browse Source 
https://github.com/bytecodealliance/wasmtime/pull/4485
This commit is contained in:
Trevor Elliott
2022-07-25 11:11:16 -07:00
committed by GitHub
parent 446efd3e11
commit ee7e4f4c6b
8 changed files with 86 additions and 74 deletions
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5
cranelift/codegen/src/isa/s390x/inst.isle
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@@ -1530,11 +1530,6 @@
(decl i64_from_offset (i64) Offset32)
(extern extractor infallible i64_from_offset i64_from_offset)
;; Accessors for `ExternalName`.
(decl box_external_name (ExternalName) BoxExternalName)
(extern constructor box_external_name box_external_name)
;; Accessors for `MemFlags`.
(decl littleendian () MemFlags)

5
cranelift/codegen/src/isa/s390x/lower/isle.rs
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@@ -578,11 +578,6 @@ where
}
}
#[inline]
fn box_external_name(&mut self, name: ExternalName) -> BoxExternalName {
Box::new(name)
}
#[inline]
fn memflags_trusted(&mut self) -> MemFlags {
MemFlags::trusted()

7
cranelift/codegen/src/isa/x64/inst.isle
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@@ -1488,6 +1488,13 @@
;;;; Helpers for Emitting Loads ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Helper for constructing a LoadExtName instruction.
(decl load_ext_name (ExternalName i64) Reg)
(rule (load_ext_name extname offset)
(let ((dst WritableGpr (temp_writable_gpr))
(_ Unit (emit (MInst.LoadExtName dst extname offset))))
dst))
;; Load a value into a register.
(decl x64_load (Type SyntheticAmode ExtKind) Reg)

10
cranelift/codegen/src/isa/x64/lower.isle
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@@ -2828,6 +2828,16 @@
(rule (lower (fence))
(side_effect (x64_mfence)))
;; Rules for `func_addr` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
(rule (lower (func_addr (func_ref_data _ extname _)))
(load_ext_name extname 0))
;; Rules for `symbol_value` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
(rule (lower (symbol_value (symbol_value_data extname _ offset)))
(load_ext_name extname offset))
;; Rules for `atomic_load` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; This is a normal load. The x86-TSO memory model provides sufficient

89
cranelift/codegen/src/isa/x64/lower.rs
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@@ -17,7 +17,6 @@ use crate::machinst::lower::*;
use crate::machinst::*;
use crate::result::CodegenResult;
use crate::settings::{Flags, TlsModel};
use alloc::boxed::Box;
use alloc::vec::Vec;
use log::trace;
use smallvec::SmallVec;
@@ -900,7 +899,31 @@ fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
| Opcode::Fdemote
| Opcode::Fvdemote
| Opcode::Icmp
| Opcode::Fcmp => {
| Opcode::Fcmp
| Opcode::Load
| Opcode::Uload8
| Opcode::Sload8
| Opcode::Uload16
| Opcode::Sload16
| Opcode::Uload32
| Opcode::Sload32
| Opcode::Sload8x8
| Opcode::Uload8x8
| Opcode::Sload16x4
| Opcode::Uload16x4
| Opcode::Sload32x2
| Opcode::Uload32x2
| Opcode::Store
| Opcode::Istore8
| Opcode::Istore16
| Opcode::Istore32
| Opcode::AtomicRmw
| Opcode::AtomicCas
| Opcode::AtomicLoad
| Opcode::AtomicStore
| Opcode::Fence
| Opcode::FuncAddr
| Opcode::SymbolValue => {
implemented_in_isle(ctx);
}
@@ -2078,68 +2101,6 @@ fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
}
}
Opcode::Load
| Opcode::Uload8
| Opcode::Sload8
| Opcode::Uload16
| Opcode::Sload16
| Opcode::Uload32
| Opcode::Sload32
| Opcode::Sload8x8
| Opcode::Uload8x8
| Opcode::Sload16x4
| Opcode::Uload16x4
| Opcode::Sload32x2
| Opcode::Uload32x2 => {
implemented_in_isle(ctx);
}
Opcode::Store | Opcode::Istore8 | Opcode::Istore16 | Opcode::Istore32 => {
implemented_in_isle(ctx);
}
Opcode::AtomicRmw => {
implemented_in_isle(ctx);
}
Opcode::AtomicCas => {
implemented_in_isle(ctx);
}
Opcode::AtomicLoad => {
implemented_in_isle(ctx);
}
Opcode::AtomicStore => {
implemented_in_isle(ctx);
}
Opcode::Fence => {
implemented_in_isle(ctx);
}
Opcode::FuncAddr => {
let dst = get_output_reg(ctx, outputs[0]).only_reg().unwrap();
let (extname, _) = ctx.call_target(insn).unwrap();
let extname = extname.clone();
ctx.emit(Inst::LoadExtName {
dst,
name: Box::new(extname),
offset: 0,
});
}
Opcode::SymbolValue => {
let dst = get_output_reg(ctx, outputs[0]).only_reg().unwrap();
let (extname, _, offset) = ctx.symbol_value(insn).unwrap();
let extname = extname.clone();
ctx.emit(Inst::LoadExtName {
dst,
name: Box::new(extname),
offset,
});
}
Opcode::DynamicStackAddr => unimplemented!("DynamicStackAddr"),
Opcode::StackAddr => {

5
cranelift/codegen/src/machinst/isle.rs
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@@ -530,6 +530,11 @@ macro_rules! isle_prelude_methods {
)
}
#[inline]
fn box_external_name(&mut self, extname: ExternalName) -> BoxExternalName {
Box::new(extname)
}
#[inline]
fn symbol_value_data(
&mut self,

4
cranelift/codegen/src/prelude.isle
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@@ -656,6 +656,9 @@
(decl symbol_value_data (ExternalName RelocDistance i64) GlobalValue)
(extern extractor symbol_value_data symbol_value_data)
(decl box_external_name (ExternalName) BoxExternalName)
(extern constructor box_external_name box_external_name)
;; Accessor for `RelocDistance`.
(decl reloc_distance_near () RelocDistance)
@@ -802,3 +805,4 @@
(convert Reg InstOutput output_reg)
(convert Value InstOutput output_value)
(convert Offset32 u32 offset32_to_u32)
(convert ExternalName BoxExternalName box_external_name)

35
cranelift/filetests/filetests/isa/x64/symbols.clif Normal file
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@@ -0,0 +1,35 @@
test compile precise-output
target x86_64
function %func_addr() -> i64 {
fn0 = %func0(i64) -> i64
block0:
v0 = func_addr.i64 fn0
return v0
}
; pushq %rbp
; movq %rsp, %rbp
; block0:
; load_ext_name %func0+0, %rax
; movq %rbp, %rsp
; popq %rbp
; ret
function %symbol_value() -> i64 {
gv0 = symbol %global0
block0:
v0 = symbol_value.i64 gv0
return v0
}
; pushq %rbp
; movq %rsp, %rbp
; block0:
; load_ext_name %global0+0, %rax
; movq %rbp, %rsp
; popq %rbp
; ret