aarch64: Use unsigned constants where appropriate (#5423)
The Rust type expected in these locations is unsigned, but these constants are negative. ISLE currently emits a Rust expression with extra type conversions in order to make this work as intended. However, across all backends, only these three aarch64 constants use this particular "feature" of ISLE, and I want to make it go away.
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@@ -3265,14 +3265,14 @@
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(fpu_to_int op src))
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(fpu_to_int op src))
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(rule (fpu_to_int_cvt_sat op src $false (fits_in_16 out_ty))
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(rule (fpu_to_int_cvt_sat op src $false (fits_in_16 out_ty))
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(let ((result Reg (fpu_to_int op src))
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(let ((result Reg (fpu_to_int op src))
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(max Reg (imm out_ty (ImmExtend.Zero) -1)))
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(max Reg (imm out_ty (ImmExtend.Zero) (ty_mask out_ty))))
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(with_flags_reg
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(with_flags_reg
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(cmp (OperandSize.Size32) result max)
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(cmp (OperandSize.Size32) result max)
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(csel (Cond.Hi) max result))))
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(csel (Cond.Hi) max result))))
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(rule (fpu_to_int_cvt_sat op src $true (fits_in_16 out_ty))
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(rule (fpu_to_int_cvt_sat op src $true (fits_in_16 out_ty))
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(let ((result Reg (fpu_to_int op src))
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(let ((result Reg (fpu_to_int op src))
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(max Reg (imm $I32 (ImmExtend.Sign) (signed_max out_ty)))
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(max Reg (signed_max out_ty))
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(min Reg (imm $I32 (ImmExtend.Sign) (signed_min out_ty)))
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(min Reg (signed_min out_ty))
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(result Reg (with_flags_reg
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(result Reg (with_flags_reg
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(cmp (operand_size out_ty) result max)
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(cmp (operand_size out_ty) result max)
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(csel (Cond.Gt) max result)))
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(csel (Cond.Gt) max result)))
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@@ -3281,13 +3281,13 @@
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(csel (Cond.Lt) min result))))
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(csel (Cond.Lt) min result))))
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result))
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result))
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(decl signed_min (Type) u64)
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(decl signed_min (Type) Reg)
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(rule (signed_min $I8) -128)
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(rule (signed_min $I8) (imm $I8 (ImmExtend.Sign) 0x80))
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(rule (signed_min $I16) -32768)
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(rule (signed_min $I16) (imm $I16 (ImmExtend.Sign) 0x8000))
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(decl signed_max (Type) u64)
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(decl signed_max (Type) Reg)
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(rule (signed_max $I8) 127)
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(rule (signed_max $I8) (imm $I8 (ImmExtend.Sign) 0x7F))
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(rule (signed_max $I16) 32767)
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(rule (signed_max $I16) (imm $I16 (ImmExtend.Sign) 0x7FFF))
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(decl fpu_to_int (FpuToIntOp Reg) Reg)
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(decl fpu_to_int (FpuToIntOp Reg) Reg)
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(rule (fpu_to_int op src)
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(rule (fpu_to_int op src)
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