Remove IFLAGS/FFLAGS types (#5406)

All instructions using the CPU flags types (IFLAGS/FFLAGS) were already
removed.  This patch completes the cleanup by removing all remaining
instructions that define values of CPU flags types, as well as the
types themselves.

Specifically, the following features are removed:
- The IFLAGS and FFLAGS types and the SpecialType category.
- Special handling of IFLAGS and FFLAGS in machinst/isle.rs and
  machinst/lower.rs.
- The ifcmp, ifcmp_imm, ffcmp, iadd_ifcin, iadd_ifcout, iadd_ifcarry,
  isub_ifbin, isub_ifbout, and isub_ifborrow instructions.
- The writes_cpu_flags instruction property.
- The flags verifier pass.
- Flags handling in the interpreter.

All of these features are currently unused; no functional change
intended by this patch.

This addresses https://github.com/bytecodealliance/wasmtime/issues/3249.

cranelift/filetests/filetests/isa/s390x/arithmetic.clif

@@ -231,107 +231,6 @@ block0(v0: i8, v1: i64):
 ;   ar %r2, %r3
 ;   br %r14
 
-function %iadd_i64(i64, i64) -> i64 {
-block0(v0: i64, v1: i64):
-  v2, v3 = iadd_ifcout.i64 v0, v1
-  return v2
-}
-
-; block0:
-;   algr %r2, %r3
-;   br %r14
-
-function %iadd_i64_ext32(i64, i32) -> i64 {
-block0(v0: i64, v1: i32):
-  v2 = uextend.i64 v1
-  v3, v4 = iadd_ifcout.i64 v0, v2
-  return v3
-}
-
-; block0:
-;   algfr %r2, %r3
-;   br %r14
-
-function %iadd_i64_imm32(i64) -> i64 {
-block0(v0: i64):
-  v1 = iconst.i64 32768
-  v2, v3 = iadd_ifcout.i64 v0, v1
-  return v2
-}
-
-; block0:
-;   algfi %r2, 32768
-;   br %r14
-
-function %iadd_i64_mem(i64, i64) -> i64 {
-block0(v0: i64, v1: i64):
-  v2 = load.i64 v1
-  v3, v4 = iadd_ifcout.i64 v0, v2
-  return v3
-}
-
-; block0:
-;   lg %r3, 0(%r3)
-;   algr %r2, %r3
-;   br %r14
-
-function %iadd_i64_mem_ext32(i64, i64) -> i64 {
-block0(v0: i64, v1: i64):
-  v2 = uload32.i64 v1
-  v3, v4 = iadd_ifcout.i64 v0, v2
-  return v3
-}
-
-; block0:
-;   llgf %r3, 0(%r3)
-;   algr %r2, %r3
-;   br %r14
-
-function %iadd_i32(i32, i32) -> i32 {
-block0(v0: i32, v1: i32):
-  v2, v3 = iadd_ifcout.i32 v0, v1
-  return v2
-}
-
-; block0:
-;   alr %r2, %r3
-;   br %r14
-
-function %iadd_i32_imm(i32) -> i32 {
-block0(v0: i32):
-  v1 = iconst.i32 32768
-  v2, v3 = iadd_ifcout.i32 v0, v1
-  return v2
-}
-
-; block0:
-;   alfi %r2, 32768
-;   br %r14
-
-function %iadd_i32_mem(i32, i64) -> i32 {
-block0(v0: i32, v1: i64):
-  v2 = load.i32 v1
-  v3, v4 = iadd_ifcout.i32 v0, v2
-  return v3
-}
-
-; block0:
-;   l %r3, 0(%r3)
-;   alr %r2, %r3
-;   br %r14
-
-function %iadd_i32_memoff(i32, i64) -> i32 {
-block0(v0: i32, v1: i64):
-  v2 = load.i32 v1+4096
-  v3, v4 = iadd_ifcout.i32 v0, v2
-  return v3
-}
-
-; block0:
-;   ly %r3, 4096(%r3)
-;   alr %r2, %r3
-;   br %r14
-
 function %isub_i128(i128, i128) -> i128 {
 block0(v0: i128, v1: i128):
   v2 = isub.i128 v0, v1

cranelift/filetests/filetests/isa/s390x/uadd_overflow_trap.clif

@@ -71,3 +71,14 @@ block0(v0: i64, v1: i64):
 ;   jle 6 ; trap
 ;   br %r14
 
+function %f5(i64, i32) -> i64 {
+block0(v0: i64, v1: i32):
+    v2 = uextend.i64 v1
+    v3 = uadd_overflow_trap v0, v2, user0
+    return v3
+}
+
+; block0:
+;   algfr %r2, %r3
+;   jle 6 ; trap
+;   br %r14

cranelift/filetests/filetests/licm/reject.clif

@@ -20,29 +20,6 @@ block3(v6: i32):
 
 }
 
-function %cpu_flags(i32, i32) -> i32 {
-block0(v0: i32, v1: i32):
-    jump block1(v0, v1)
-
-block1(v2: i32, v3: i32):
-    v4 = ifcmp.i32 v0, v1
-    v5 = selectif.i32 eq v4, v2, v3
-; check: block1(v2: i32, v3: i32):
-; check: ifcmp.i32 v0, v1
-; check: v5 = selectif.i32 eq v4, v2, v3
-    v8 = iconst.i32 1
-    brz v1, block3(v1)
-    jump block2
-
-block2:
-    v9 = isub v1, v8
-    v10 = iadd v1, v8
-    jump block1(v9, v10)
-
-block3(v6: i32):
-    return v6
-}
-
 function %spill(i32, i32) -> i32 {
 block0(v0: i32, v1: i32):
     v2 = spill.i32 v0

cranelift/filetests/filetests/parser/ternary.clif

@@ -1,24 +1,31 @@
 test cat
 test verifier
 
+function %select(i32, i32, i32) -> i32 {
+block1(v1: i32, v2: i32, v3: i32):
+    v10 = select v1, v2, v3
+    ;check: v10 = select v1, v2, v3
+    return v10
+}
+
 function %add_i96(i32, i32, i32, i32, i32, i32) -> i32, i32, i32 {
 block1(v1: i32, v2: i32, v3: i32, v4: i32, v5: i32, v6: i32):
-    v10, v11 = iadd_ifcout v1, v4
-    ;check: v10, v11 = iadd_ifcout v1, v4
-    v20, v21 = iadd_ifcarry v2, v5, v11
-    ; check: v20, v21 = iadd_ifcarry v2, v5, v11
-    v30 = iadd_ifcin v3, v6, v21
-    ; check: v30 = iadd_ifcin v3, v6, v21
+    v10, v11 = iadd_cout v1, v4
+    ;check: v10, v11 = iadd_cout v1, v4
+    v20, v21 = iadd_carry v2, v5, v11
+    ; check: v20, v21 = iadd_carry v2, v5, v11
+    v30 = iadd_cin v3, v6, v21
+    ; check: v30 = iadd_cin v3, v6, v21
     return v10, v20, v30
 }
 
 function %sub_i96(i32, i32, i32, i32, i32, i32) -> i32, i32, i32 {
 block1(v1: i32, v2: i32, v3: i32, v4: i32, v5: i32, v6: i32):
-    v10, v11 = isub_ifbout v1, v4
-    ;check: v10, v11 = isub_ifbout v1, v4
-    v20, v21 = isub_ifborrow v2, v5, v11
-    ; check: v20, v21 = isub_ifborrow v2, v5, v11
-    v30 = isub_ifbin v3, v6, v21
-    ; check: v30 = isub_ifbin v3, v6, v21
+    v10, v11 = isub_bout v1, v4
+    ;check: v10, v11 = isub_bout v1, v4
+    v20, v21 = isub_borrow v2, v5, v11
+    ; check: v20, v21 = isub_borrow v2, v5, v11
+    v30 = isub_bin v3, v6, v21
+    ; check: v30 = isub_bin v3, v6, v21
     return v10, v20, v30
 }