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Vector bitcast support (AArch64 & Interpreter) (#4820)

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* Vector bitcast support (AArch64 & Interpreter)

Implemented support for `bitcast` on vector values for AArch64 and the
interpreter.

Also corrected the verifier to ensure that the size, in bits, of the input and
output types match for a `bitcast`, per the docs.

Copyright (c) 2022 Arm Limited

* `I128` same-type bitcast support

Copyright (c) 2022 Arm Limited

* Directly return input for 64-bit GPR<=>GPR bitcast

Copyright (c) 2022 Arm Limited
This commit is contained in:
Damian Heaton
2022-09-21 17:20:28 +01:00
committed by GitHub
parent 05cbd667c7
commit e786bda002
15 changed files with 478 additions and 26 deletions
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7
cranelift/codegen/src/isa/aarch64/lower_inst.rs
View File

@@ -268,12 +268,7 @@ pub(crate) fn lower_insn_to_regs(
Opcode::IsNull | Opcode::IsInvalid => implemented_in_isle(ctx),
Opcode::Copy => {
let rd = get_output_reg(ctx, outputs[0]).only_reg().unwrap();
let rn = put_input_in_reg(ctx, inputs[0], NarrowValueMode::None);
let ty = ctx.input_ty(insn, 0);
ctx.emit(Inst::gen_move(rd, rn, ty));
}
Opcode::Copy => implemented_in_isle(ctx),
Opcode::Breduce | Opcode::Ireduce => implemented_in_isle(ctx),