[AArch64] Merge 32- and 64-bit ALUOps (#3802)

Combine the two opcodes into one and pass and add an OperandSize field to these instructions, as well as an ISLE helper to perform the conversion from Type. This saves us from having having to write ISLE helpers to select the correct opcode, based on type, and reduces the amount of code needed for emission. Copyright (c) 2022, Arm Limited.
2022-02-17 18:03:54 +00:00
parent b62fe21914
commit e572198f85
10 changed files with 1786 additions and 1987 deletions
--- a/cranelift/codegen/src/isa/aarch64/lower/isle/generated_code.manifest
+++ b/cranelift/codegen/src/isa/aarch64/lower/isle/generated_code.manifest
@@ -1,4 +1,4 @@
 src/clif.isle 9ea75a6f790b5c03
 src/prelude.isle 73285cd431346d53
-src/isa/aarch64/inst.isle dafd813ba278ce19
-src/isa/aarch64/lower.isle 2d2e1e076a0c8a23
+src/isa/aarch64/inst.isle 4c176462894836e5
+src/isa/aarch64/lower.isle aff657984bf30686
--- a/cranelift/codegen/src/isa/aarch64/lower/isle/generated_code.rs
+++ b/cranelift/codegen/src/isa/aarch64/lower/isle/generated_code.rs