From e3a423c3e83ee6000efe2732d994786d2893dbb2 Mon Sep 17 00:00:00 2001 From: Nick Fitzgerald Date: Mon, 25 Oct 2021 15:51:55 -0700 Subject: [PATCH] Remove some uses of `foo.expect(&format!(...))` pattern This eagerly evaluates the `format!` and produces a `String` with a heap allocation, regardless whether `foo` is `Some`/`Ok` or `None`/`Err`. Using `foo.unwrap_or_else(|| panic!(...))` makes it so that the error message formatting is only evaluated if `foo` is `None`/`Err`. --- benches/instantiation.rs | 2 +- cranelift/codegen/src/isa/x64/abi.rs | 2 +- cranelift/codegen/src/isa/x64/lower.rs | 14 ++++++++------ 3 files changed, 10 insertions(+), 8 deletions(-) diff --git a/benches/instantiation.rs b/benches/instantiation.rs index 43553d664b..8236fbd02c 100644 --- a/benches/instantiation.rs +++ b/benches/instantiation.rs @@ -43,7 +43,7 @@ fn bench_sequential(c: &mut Criterion, modules: &[&str]) { let engine = Engine::new(&config).expect("failed to create engine"); let module = Module::from_file(&engine, &path) - .expect(&format!("failed to load benchmark `{}`", path.display())); + .unwrap_or_else(|_| panic!("failed to load benchmark `{}`", path.display())); let mut linker = Linker::new(&engine); wasmtime_wasi::add_to_linker(&mut linker, |cx| cx).unwrap(); diff --git a/cranelift/codegen/src/isa/x64/abi.rs b/cranelift/codegen/src/isa/x64/abi.rs index f0c36dd6d7..7a4352b38f 100644 --- a/cranelift/codegen/src/isa/x64/abi.rs +++ b/cranelift/codegen/src/isa/x64/abi.rs @@ -349,7 +349,7 @@ impl ABIMachineSpec for X64ABIMachineSpec { to_bits: u8, ) -> Self::I { let ext_mode = ExtMode::new(from_bits as u16, to_bits as u16) - .expect(&format!("invalid extension: {} -> {}", from_bits, to_bits)); + .unwrap_or_else(|| panic!("invalid extension: {} -> {}", from_bits, to_bits)); if is_signed { Inst::movsx_rm_r(ext_mode, RegMem::reg(from_reg), to_reg) } else { diff --git a/cranelift/codegen/src/isa/x64/lower.rs b/cranelift/codegen/src/isa/x64/lower.rs index 78cbeb6272..eb7711480c 100644 --- a/cranelift/codegen/src/isa/x64/lower.rs +++ b/cranelift/codegen/src/isa/x64/lower.rs @@ -236,7 +236,7 @@ fn extend_input_to_reg>( let ext_mode = match (input_size, requested_size) { (a, b) if a == b => return put_input_in_reg(ctx, spec), (1, 8) => return put_input_in_reg(ctx, spec), - (a, b) => ExtMode::new(a, b).expect(&format!("invalid extension: {} -> {}", a, b)), + (a, b) => ExtMode::new(a, b).unwrap_or_else(|| panic!("invalid extension: {} -> {}", a, b)), }; let src = input_to_reg_mem(ctx, spec); @@ -5847,11 +5847,13 @@ fn lower_insn_to_regs>( if ty_access == types::I64 { ctx.emit(Inst::mov64_rm_r(rm, data)); } else { - let ext_mode = ExtMode::new(ty_access.bits(), 64).expect(&format!( - "invalid extension during AtomicLoad: {} -> {}", - ty_access.bits(), - 64 - )); + let ext_mode = ExtMode::new(ty_access.bits(), 64).unwrap_or_else(|| { + panic!( + "invalid extension during AtomicLoad: {} -> {}", + ty_access.bits(), + 64 + ) + }); ctx.emit(Inst::movzx_rm_r(ext_mode, rm, data)); } }