Emergency spilling for the solver's move scheduler.

The register constraint solver schedules a set of move instructions to
execute before the instruction getting colored. In extreme cases, this
is not possible because there are no available registers to break cycles
in the register assignments that must be scheduled.

When that happens, we spill one register to an emergency slot so it
becomes available for implementing the assignment cycle. Then the
original register is restored.

The coloring pass can't yet understand the spill and fill move types.
This will be implemented next.

lib/cretonne/src/isa/registers.rs

@@ -209,6 +209,13 @@ impl fmt::Debug for RegClassData {
     }
 }
 
+/// Within an ISA, register classes are uniquely identified by their index.
+impl PartialEq for RegClassData {
+    fn eq(&self, other: &RegClassData) -> bool {
+        self.index == other.index
+    }
+}
+
 /// A small reference to a register class.
 ///
 /// Use this when storing register classes in compact data structures. The `RegInfo::rc()` method