Fix x86 encoding of uextend/sextend from 8-bit inputs.
The x86-32 and non-REX encodings of movsbl and movzbl require one of the ABCD registers as input.
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@@ -128,6 +128,7 @@ enc_i32_i64(base.copy, r.umr, 0x89)
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enc_both(base.copy.b1, r.umr, 0x89)
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enc_i32_i64(base.regmove, r.rmov, 0x89)
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enc_both(base.regmove.b1, r.rmov, 0x89)
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enc_both(base.regmove.i8, r.rmov, 0x89)
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# Immediate instructions with sign-extended 8-bit and 32-bit immediate.
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for inst, rrr in [
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@@ -461,9 +462,9 @@ X86_64.enc(base.ireduce.i32.i64, r.null, 0)
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# instructions for %al/%ax/%eax to %ax/%eax/%rax.
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# movsbl
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X86_32.enc(base.sextend.i32.i8, *r.urm_noflags(0x0f, 0xbe))
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X86_32.enc(base.sextend.i32.i8, *r.urm_noflags_abcd(0x0f, 0xbe))
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X86_64.enc(base.sextend.i32.i8, *r.urm_noflags.rex(0x0f, 0xbe))
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X86_64.enc(base.sextend.i32.i8, *r.urm_noflags(0x0f, 0xbe))
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X86_64.enc(base.sextend.i32.i8, *r.urm_noflags_abcd(0x0f, 0xbe))
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# movswl
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X86_32.enc(base.sextend.i32.i16, *r.urm_noflags(0x0f, 0xbf))
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@@ -480,9 +481,9 @@ X86_64.enc(base.sextend.i64.i16, *r.urm_noflags.rex(0x0f, 0xbf, w=1))
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X86_64.enc(base.sextend.i64.i32, *r.urm_noflags.rex(0x63, w=1))
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# movzbl
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X86_32.enc(base.uextend.i32.i8, *r.urm_noflags(0x0f, 0xb6))
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X86_32.enc(base.uextend.i32.i8, *r.urm_noflags_abcd(0x0f, 0xb6))
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X86_64.enc(base.uextend.i32.i8, *r.urm_noflags.rex(0x0f, 0xb6))
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X86_64.enc(base.uextend.i32.i8, *r.urm_noflags(0x0f, 0xb6))
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X86_64.enc(base.uextend.i32.i8, *r.urm_noflags_abcd(0x0f, 0xb6))
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# movzwl
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X86_32.enc(base.uextend.i32.i16, *r.urm_noflags(0x0f, 0xb7))
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