cranelift: Emit a trap when dividing by zero in interpreter
Fixes #3058
This commit is contained in:
committed by
Andrew Brown
parent
6be4441bbf
commit
df48798396
@@ -72,6 +72,15 @@ where
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// Indicate that the result of a step is to assign a single value to an instruction's results.
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let assign = |value: V| ControlFlow::Assign(smallvec![value]);
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// Similar to `assign` but converts some errors into traps
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let assign_or_trap = |value: ValueResult<V>| match value {
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Ok(v) => Ok(assign(v)),
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Err(ValueError::IntegerDivisionByZero) => Ok(ControlFlow::Trap(CraneliftTrap::User(
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TrapCode::IntegerDivisionByZero,
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))),
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Err(e) => Err(e),
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};
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// Interpret a binary instruction with the given `op`, assigning the resulting value to the
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// instruction's results.
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let binary = |op: fn(V, V) -> ValueResult<V>,
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@@ -79,18 +88,24 @@ where
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right: V|
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-> ValueResult<ControlFlow<V>> { Ok(assign(op(left, right)?)) };
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// Same as `binary`, but converts the values to their unsigned form before the operation and
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// back to signed form afterwards. Since Cranelift types have no notion of signedness, this
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// enables operations that depend on sign.
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let binary_unsigned =
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// Similar to `binary` but converts select `ValueError`'s into trap `ControlFlow`'s
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let binary_can_trap = |op: fn(V, V) -> ValueResult<V>,
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left: V,
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right: V|
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-> ValueResult<ControlFlow<V>> { assign_or_trap(op(left, right)) };
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// Same as `binary_can_trap`, but converts the values to their unsigned form before the
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// operation and back to signed form afterwards. Since Cranelift types have no notion of
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// signedness, this enables operations that depend on sign.
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let binary_unsigned_can_trap =
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|op: fn(V, V) -> ValueResult<V>, left: V, right: V| -> ValueResult<ControlFlow<V>> {
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Ok(assign(
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assign_or_trap(
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op(
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left.convert(ValueConversionKind::ToUnsigned)?,
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right.convert(ValueConversionKind::ToUnsigned)?,
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)?
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.convert(ValueConversionKind::ToSigned)?,
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))
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)
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.and_then(|v| v.convert(ValueConversionKind::ToSigned)),
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)
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};
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// Choose whether to assign `left` or `right` to the instruction's result based on a `condition`.
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@@ -425,16 +440,16 @@ where
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Opcode::Imul => binary(Value::mul, arg(0)?, arg(1)?)?,
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Opcode::Umulhi => unimplemented!("Umulhi"),
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Opcode::Smulhi => unimplemented!("Smulhi"),
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Opcode::Udiv => binary_unsigned(Value::div, arg(0)?, arg(1)?)?,
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Opcode::Sdiv => binary(Value::div, arg(0)?, arg(1)?)?,
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Opcode::Urem => binary_unsigned(Value::rem, arg(0)?, arg(1)?)?,
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Opcode::Srem => binary(Value::rem, arg(0)?, arg(1)?)?,
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Opcode::Udiv => binary_unsigned_can_trap(Value::div, arg(0)?, arg(1)?)?,
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Opcode::Sdiv => binary_can_trap(Value::div, arg(0)?, arg(1)?)?,
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Opcode::Urem => binary_unsigned_can_trap(Value::rem, arg(0)?, arg(1)?)?,
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Opcode::Srem => binary_can_trap(Value::rem, arg(0)?, arg(1)?)?,
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Opcode::IaddImm => binary(Value::add, arg(0)?, imm_as_ctrl_ty()?)?,
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Opcode::ImulImm => binary(Value::mul, arg(0)?, imm_as_ctrl_ty()?)?,
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Opcode::UdivImm => binary_unsigned(Value::div, arg(0)?, imm())?,
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Opcode::SdivImm => binary(Value::div, arg(0)?, imm_as_ctrl_ty()?)?,
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Opcode::UremImm => binary_unsigned(Value::rem, arg(0)?, imm())?,
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Opcode::SremImm => binary(Value::rem, arg(0)?, imm_as_ctrl_ty()?)?,
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Opcode::UdivImm => binary_unsigned_can_trap(Value::div, arg(0)?, imm())?,
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Opcode::SdivImm => binary_can_trap(Value::div, arg(0)?, imm_as_ctrl_ty()?)?,
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Opcode::UremImm => binary_unsigned_can_trap(Value::rem, arg(0)?, imm())?,
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Opcode::SremImm => binary_can_trap(Value::rem, arg(0)?, imm_as_ctrl_ty()?)?,
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Opcode::IrsubImm => binary(Value::sub, imm_as_ctrl_ty()?, arg(0)?)?,
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Opcode::IaddCin => unimplemented!("IaddCin"),
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Opcode::IaddIfcin => unimplemented!("IaddIfcin"),
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