cranelift: Add big and little endian memory accesses to interpreter (#5893)
* Added `mem_flags` parameter to `State::checked_{load,store}` as the means
for determining the endianness, typically derived from an instruction.
* Added `native_endianness` property to `InterpreterState` as fallback when
determining endianness, such as in cases where there are no memory flags
avaiable or set.
* Added `to_be` and `to_le` methods to `DataValue`.
* Added `AtomicCas` and `AtomicRmw` to list of instructions with retrievable
memory flags for `InstructionData::memflags`.
* Enabled `atomic-{cas,rmw}-subword-{big,little}.clif` for interpreter run
tests.
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@@ -1,3 +1,4 @@
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test interpret
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test run
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target s390x
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@@ -1,3 +1,4 @@
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test interpret
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test run
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target s390x
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target aarch64
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@@ -1,3 +1,4 @@
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test interpret
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test run
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target s390x
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target s390x has_mie2
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@@ -431,10 +432,10 @@ block0(v0: i32, v1: i64, v2: i16):
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v6 = load.i32 big v3
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return v6
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}
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; run: %atomic_rmw_xchg_little_i16(0x12345678, 0, 0x1111) == 0x11115678
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; run: %atomic_rmw_xchg_little_i16(0x12345678, 0, 0xffff) == 0xffff5678
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; run: %atomic_rmw_xchg_little_i16(0x12345678, 2, 0x1111) == 0x12341111
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; run: %atomic_rmw_xchg_little_i16(0x12345678, 2, 0xffff) == 0x1234ffff
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; run: %atomic_rmw_xchg_big_i16(0x12345678, 0, 0x1111) == 0x11115678
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; run: %atomic_rmw_xchg_big_i16(0x12345678, 0, 0xffff) == 0xffff5678
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; run: %atomic_rmw_xchg_big_i16(0x12345678, 2, 0x1111) == 0x12341111
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; run: %atomic_rmw_xchg_big_i16(0x12345678, 2, 0xffff) == 0x1234ffff
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function %atomic_rmw_xchg_big_i8(i32, i64, i8) -> i32 {
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@@ -1,3 +1,4 @@
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test interpret
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test run
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target s390x
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target s390x has_mie2
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