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[AArch64] Port min/max to ISLE (#4374)

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Copyright (c) 2022, Arm Limited.
This commit is contained in:
Sam Parker
2022-07-05 17:16:45 +01:00
committed by GitHub
parent e91f493ff5
commit d9e0e6a6a9
6 changed files with 511 additions and 28 deletions
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244
cranelift/filetests/filetests/isa/aarch64/simd-min-max.clif Normal file
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@@ -0,0 +1,244 @@
test compile precise-output
set unwind_info=false
target aarch64
function %fn0(i8x8, i8x8) -> i8x8 {
block0(v0: i8x8, v1: i8x8):
v2 = imin v0, v1
return v2
}
; block0:
; smin v0.8b, v0.8b, v1.8b
; ret
function %fn1(i8x16, i8x16) -> i8x16 {
block0(v0: i8x16, v1: i8x16):
v2 = imin v0, v1
return v2
}
; block0:
; smin v0.16b, v0.16b, v1.16b
; ret
function %fn2(i16x4, i16x4) -> i16x4 {
block0(v0: i16x4, v1: i16x4):
v2 = imin v0, v1
return v2
}
; block0:
; smin v0.4h, v0.4h, v1.4h
; ret
function %fn3(i16x8, i16x8) -> i16x8 {
block0(v0: i16x8, v1: i16x8):
v2 = imin v0, v1
return v2
}
; block0:
; smin v0.8h, v0.8h, v1.8h
; ret
function %fn4(i32x2, i32x2) -> i32x2 {
block0(v0: i32x2, v1: i32x2):
v2 = imin v0, v1
return v2
}
; block0:
; smin v0.2s, v0.2s, v1.2s
; ret
function %fn5(i32x4, i32x4) -> i32x4 {
block0(v0: i32x4, v1: i32x4):
v2 = imin v0, v1
return v2
}
; block0:
; smin v0.4s, v0.4s, v1.4s
; ret
function %fn6(i8x8, i8x8) -> i8x8 {
block0(v0: i8x8, v1: i8x8):
v2 = umin v0, v1
return v2
}
; block0:
; umin v0.8b, v0.8b, v1.8b
; ret
function %fn7(i8x16, i8x16) -> i8x16 {
block0(v0: i8x16, v1: i8x16):
v2 = umin v0, v1
return v2
}
; block0:
; umin v0.16b, v0.16b, v1.16b
; ret
function %fn8(i16x4, i16x4) -> i16x4 {
block0(v0: i16x4, v1: i16x4):
v2 = umin v0, v1
return v2
}
; block0:
; umin v0.4h, v0.4h, v1.4h
; ret
function %fn9(i16x8, i16x8) -> i16x8 {
block0(v0: i16x8, v1: i16x8):
v2 = umin v0, v1
return v2
}
; block0:
; umin v0.8h, v0.8h, v1.8h
; ret
function %fn10(i32x2, i32x2) -> i32x2 {
block0(v0: i32x2, v1: i32x2):
v2 = umin v0, v1
return v2
}
; block0:
; umin v0.2s, v0.2s, v1.2s
; ret
function %fn11(i32x4, i32x4) -> i32x4 {
block0(v0: i32x4, v1: i32x4):
v2 = umin v0, v1
return v2
}
; block0:
; umin v0.4s, v0.4s, v1.4s
; ret
function %fn12(i8x8, i8x8) -> i8x8 {
block0(v0: i8x8, v1: i8x8):
v2 = imax v0, v1
return v2
}
; block0:
; smax v0.8b, v0.8b, v1.8b
; ret
function %fn13(i8x16, i8x16) -> i8x16 {
block0(v0: i8x16, v1: i8x16):
v2 = imax v0, v1
return v2
}
; block0:
; smax v0.16b, v0.16b, v1.16b
; ret
function %fn14(i16x4, i16x4) -> i16x4 {
block0(v0: i16x4, v1: i16x4):
v2 = imax v0, v1
return v2
}
; block0:
; smax v0.4h, v0.4h, v1.4h
; ret
function %fn15(i16x8, i16x8) -> i16x8 {
block0(v0: i16x8, v1: i16x8):
v2 = imax v0, v1
return v2
}
; block0:
; smax v0.8h, v0.8h, v1.8h
; ret
function %fn16(i32x2, i32x2) -> i32x2 {
block0(v0: i32x2, v1: i32x2):
v2 = imax v0, v1
return v2
}
; block0:
; smax v0.2s, v0.2s, v1.2s
; ret
function %fn17(i32x4, i32x4) -> i32x4 {
block0(v0: i32x4, v1: i32x4):
v2 = imax v0, v1
return v2
}
; block0:
; smax v0.4s, v0.4s, v1.4s
; ret
function %fn18(i8x8, i8x8) -> i8x8 {
block0(v0: i8x8, v1: i8x8):
v2 = umax v0, v1
return v2
}
; block0:
; umax v0.8b, v0.8b, v1.8b
; ret
function %fn19(i8x16, i8x16) -> i8x16 {
block0(v0: i8x16, v1: i8x16):
v2 = umax v0, v1
return v2
}
; block0:
; umax v0.16b, v0.16b, v1.16b
; ret
function %fn20(i16x4, i16x4) -> i16x4 {
block0(v0: i16x4, v1: i16x4):
v2 = umax v0, v1
return v2
}
; block0:
; umax v0.4h, v0.4h, v1.4h
; ret
function %fn21(i16x8, i16x8) -> i16x8 {
block0(v0: i16x8, v1: i16x8):
v2 = umax v0, v1
return v2
}
; block0:
; umax v0.8h, v0.8h, v1.8h
; ret
function %fn22(i32x2, i32x2) -> i32x2 {
block0(v0: i32x2, v1: i32x2):
v2 = umax v0, v1
return v2
}
; block0:
; umax v0.2s, v0.2s, v1.2s
; ret
function %fn23(i32x4, i32x4) -> i32x4 {
block0(v0: i32x4, v1: i32x4):
v2 = umax v0, v1
return v2
}
; block0:
; umax v0.4s, v0.4s, v1.4s
; ret

107
cranelift/filetests/filetests/runtests/simd-min-max.clif Normal file
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test run
target aarch64
target x86_64
function %imin_i8x16(i8x16, i8x16) -> i8x16 {
block0(v0: i8x16, v1: i8x16):
v2 = imin v0, v1
return v2
}
; run: %imin_i8x16([0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f], [0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f ]) == [ 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f ]
; run: %imin_i8x16([0x90 0x01 0x92 0x03 0x94 0x05 0x96 0x07 0x98 0x09 0x9a 0x0b 0x9c 0x0d 0x9e 0x0f], [0x10 0x91 0x12 0x93 0x14 0x95 0x16 0x97 0x18 0x99 0x1a 0x9b 0x1c 0x9d 0x1e 0x9f ]) == [ 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f ]
function %imin_i16x8(i16x8, i16x8) -> i16x8 {
block0(v0: i16x8, v1: i16x8):
v2 = imin v0, v1
return v2
}
; run: %imin_i16x8([0x1234 0x5678 0x9876 0x5432 0x7654 0x1234 0x4567 0x3456 ], [ 0x4567 0x1234 0x6789 0x0987 0x0123 0x3210 0x7890 0x3456 ]) == [ 0x1234 0x1234 0x9876 0x0987 0x0123 0x1234 0x4567 0x3456 ]
function %imin_i32x4(i32x4, i32x4) -> i32x4 {
block0(v0: i32x4, v1: i32x4):
v2 = imin v0, v1
return v2
}
; run: %imin_i32x4([0xBAADF00D 0xDEADBEEF 0xC00FFFEE 0xBADAB00F], [0xCA11ACAB 0x12349876 0x98763210 0x43216789]) == [ 0xBAADF00D 0xDEADBEEF 0x98763210 0xBADAB00F ]
function %umin_i8x16(i8x16, i8x16) -> i8x16 {
block0(v0: i8x16, v1: i8x16):
v2 = umin v0, v1
return v2
}
; run: %umin_i8x16([0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f], [0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f ]) == [ 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f ]
; run: %umin_i8x16([0x90 0x01 0x92 0x03 0x94 0x05 0x96 0x07 0x98 0x09 0x9a 0x0b 0x9c 0x0d 0x9e 0x0f], [0x10 0x91 0x12 0x93 0x14 0x95 0x16 0x97 0x18 0x99 0x1a 0x9b 0x1c 0x9d 0x1e 0x9f ]) == [ 0x10 0x01 0x12 0x03 0x14 0x05 0x16 0x07 0x18 0x09 0x1a 0x0b 0x1c 0x0d 0x1e 0x0f ]
function %umin_i16x8(i16x8, i16x8) -> i16x8 {
block0(v0: i16x8, v1: i16x8):
v2 = umin v0, v1
return v2
}
; run: %umin_i16x8([0x1234 0x5678 0x9876 0x5432 0x7654 0x1234 0x4567 0x3456 ], [ 0x4567 0x1234 0x6789 0x0987 0x0123 0x3210 0x7890 0x3456 ]) == [ 0x1234 0x1234 0x6789 0x0987 0x0123 0x1234 0x4567 0x3456 ]
function %umin_i32x4(i32x4, i32x4) -> i32x4 {
block0(v0: i32x4, v1: i32x4):
v2 = umin v0, v1
return v2
}
; run: %umin_i32x4([0xBAADF00D 0xDEADBEEF 0xC00FFFEE 0xBADAB00F], [0xCA11ACAB 0x12349876 0x98763210 0x43216789]) == [ 0xBAADF00D 0x12349876 0x98763210 0x43216789 ]
function %imax_i8x16(i8x16, i8x16) -> i8x16 {
block0(v0: i8x16, v1: i8x16):
v2 = imax v0, v1
return v2
}
; run: %imax_i8x16([0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f], [0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f ]) == [ 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f ]
; run: %imax_i8x16([0x90 0x01 0x92 0x03 0x94 0x05 0x96 0x07 0x98 0x09 0x9a 0x0b 0x9c 0x0d 0x9e 0x0f], [0x10 0x91 0x12 0x93 0x14 0x95 0x16 0x97 0x18 0x99 0x1a 0x9b 0x1c 0x9d 0x1e 0x9f ]) == [ 0x10 0x01 0x12 0x03 0x14 0x05 0x16 0x07 0x18 0x09 0x1a 0x0b 0x1c 0x0d 0x1e 0x0f ]
function %imax_i16x8(i16x8, i16x8) -> i16x8 {
block0(v0: i16x8, v1: i16x8):
v2 = imax v0, v1
return v2
}
; run: %imax_i16x8([0x1234 0x5678 0x9876 0x5432 0x7654 0x1234 0x4567 0x3456 ], [ 0x4567 0x1234 0x6789 0x0987 0x0123 0x3210 0x7890 0x3456 ]) == [ 0x4567 0x5678 0x6789 0x5432 0x7654 0x3210 0x7890 0x3456 ]
function %imax_i32x4(i32x4, i32x4) -> i32x4 {
block0(v0: i32x4, v1: i32x4):
v2 = imax v0, v1
return v2
}
; run: %imax_i32x4([0xBAADF00D 0xDEADBEEF 0xC00FFFEE 0xBADAB00F], [0xCA11ACAB 0x12349876 0x98763210 0x43216789]) == [ 0xCA11ACAB 0x12349876 0xC00FFFEE 0x43216789 ]
function %umax_i8x16(i8x16, i8x16) -> i8x16 {
block0(v0: i8x16, v1: i8x16):
v2 = umax v0, v1
return v2
}
; run: %umax_i8x16([0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f], [0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f ]) == [ 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f ]
; run: %umax_i8x16([0x90 0x01 0x92 0x03 0x94 0x05 0x96 0x07 0x98 0x09 0x9a 0x0b 0x9c 0x0d 0x9e 0x0f], [0x10 0x91 0x12 0x93 0x14 0x95 0x16 0x97 0x18 0x99 0x1a 0x9b 0x1c 0x9d 0x1e 0x9f ]) == [ 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f ]
function %umax_i16x8(i16x8, i16x8) -> i16x8 {
block0(v0: i16x8, v1: i16x8):
v2 = umax v0, v1
return v2
}
; run: %umax_i16x8([0x1234 0x5678 0x9876 0x5432 0x7654 0x1234 0x4567 0x3456 ], [ 0x4567 0x1234 0x6789 0x0987 0x0123 0x3210 0x7890 0x3456 ]) == [ 0x4567 0x5678 0x9876 0x5432 0x7654 0x3210 0x7890 0x3456 ]
function %umax_i32x4(i32x4, i32x4) -> i32x4 {
block0(v0: i32x4, v1: i32x4):
v2 = umax v0, v1
return v2
}
; run: %umax_i32x4([0xBAADF00D 0xDEADBEEF 0xC00FFFEE 0xBADAB00F], [0xCA11ACAB 0x12349876 0x98763210 0x43216789]) == [ 0xCA11ACAB 0xDEADBEEF 0xC00FFFEE 0xBADAB00F ]