aarch64: Migrate ishl/ushr/sshr to ISLE (#3608)

* aarch64: Migrate ishl/ushr/sshr to ISLE

This commit migrates the `ishl`, `ushr`, and `sshr` instructions to
ISLE. These involve special cases for almost all types of integers
(including vectors) and helper functions for the i128 lowerings since
the i128 lowerings look to be used for other instructions as well. This
doesn't delete the i128 lowerings in the Rust code just yet because
they're still used by Rust lowerings, but they should be deletable in
due time once those lowerings are translated to ISLE.

* Use more descriptive names for i128 lowerings

* Use a with_flags-lookalike for csel

* Use existing `with_flags_*`

* Coment backwards order

* Update generated code

cranelift/filetests/filetests/isa/aarch64/bitops.clif

@@ -742,15 +742,15 @@ block0(v0: i128, v1: i8):
     return v2
 }
 
-; check: orn w3, wzr, w2
-; nextln: lsr x4, x0, #1
-; nextln: lsl x1, x1, x2
-; nextln: lsr x3, x4, x3
-; nextln: lsl x0, x0, x2
+; check:  lsl x4, x0, x2
+; nextln: lsl x3, x1, x2
+; nextln: orn w1, wzr, w2
+; nextln: lsr x0, x0, #1
+; nextln: lsr x0, x0, x1
+; nextln: orr x0, x3, x0
 ; nextln: ands xzr, x2, #64
-; nextln: orr x1, x1, x3
-; nextln: csel x1, x0, x1, ne
-; nextln: csel x0, xzr, x0, ne
+; nextln: csel x1, x4, x0, ne
+; nextln: csel x0, xzr, x4, ne
 ; nextln: ret
 
 
@@ -760,15 +760,15 @@ block0(v0: i128, v1: i128):
     return v2
 }
 
-; check: orn w3, wzr, w2
-; nextln: lsr x4, x0, #1
+; check:  lsl x3, x0, x2
 ; nextln: lsl x1, x1, x2
-; nextln: lsr x3, x4, x3
-; nextln: lsl x0, x0, x2
+; nextln: orn w4, wzr, w2
+; nextln: lsr x0, x0, #1
+; nextln: lsr x0, x0, x4
+; nextln: orr x0, x1, x0
 ; nextln: ands xzr, x2, #64
-; nextln: orr x1, x1, x3
-; nextln: csel x1, x0, x1, ne
-; nextln: csel x0, xzr, x0, ne
+; nextln: csel x1, x3, x0, ne
+; nextln: csel x0, xzr, x3, ne
 ; nextln: ret
 
 
@@ -778,16 +778,15 @@ block0(v0: i128, v1: i8):
     return v2
 }
 
-; check: orn w3, wzr, w2
-; nextln: lsl x4, x1, #1
-; nextln: lsr x0, x0, x2
-; nextln: lsl x3, x4, x3
-; nextln: lsr x1, x1, x2
+; check:  lsr x3, x0, x2
+; nextln: lsr x0, x1, x2
+; nextln: orn w4, wzr, w2
+; nextln: lsl x1, x1, #1
+; nextln: lsl x1, x1, x4
+; nextln: orr x3, x3, x1
 ; nextln: ands xzr, x2, #64
-; nextln: orr x0, x0, x3
-; nextln: csel x2, xzr, x1, ne
-; nextln: csel x0, x1, x0, ne
-; nextln: mov x1, x2
+; nextln: csel x1, xzr, x0, ne
+; nextln: csel x0, x0, x3, ne
 ; nextln: ret
 
 
@@ -797,16 +796,15 @@ block0(v0: i128, v1: i128):
     return v2
 }
 
-; check: orn w3, wzr, w2
-; nextln: lsl x4, x1, #1
-; nextln: lsr x0, x0, x2
-; nextln: lsl x3, x4, x3
-; nextln: lsr x1, x1, x2
+; check:  lsr x3, x0, x2
+; nextln: lsr x0, x1, x2
+; nextln: orn w4, wzr, w2
+; nextln: lsl x1, x1, #1
+; nextln: lsl x1, x1, x4
+; nextln: orr x3, x3, x1
 ; nextln: ands xzr, x2, #64
-; nextln: orr x0, x0, x3
-; nextln: csel x2, xzr, x1, ne
-; nextln: csel x0, x1, x0, ne
-; nextln: mov x1, x2
+; nextln: csel x1, xzr, x0, ne
+; nextln: csel x0, x0, x3, ne
 ; nextln: ret
 
 
@@ -816,16 +814,16 @@ block0(v0: i128, v1: i8):
     return v2
 }
 
-; check: orn w3, wzr, w2
-; nextln: lsl x4, x1, #1
-; nextln: lsr x0, x0, x2
-; nextln: lsl x4, x4, x3
-; nextln: asr x3, x1, x2
-; nextln: ands xzr, x2, #64
+; check:  lsr x3, x0, x2
+; nextln: asr x0, x1, x2
+; nextln: orn w4, wzr, w2
+; nextln: lsl x5, x1, #1
+; nextln: lsl x4, x5, x4
 ; nextln: asr x1, x1, #63
-; nextln: orr x0, x0, x4
-; nextln: csel x1, x1, x3, ne
-; nextln: csel x0, x3, x0, ne
+; nextln: orr x3, x3, x4
+; nextln: ands xzr, x2, #64
+; nextln: csel x1, x1, x0, ne
+; nextln: csel x0, x0, x3, ne
 ; nextln: ret
 
 
@@ -835,14 +833,14 @@ block0(v0: i128, v1: i128):
     return v2
 }
 
-; check: orn w3, wzr, w2
-; nextln: lsl x4, x1, #1
-; nextln: lsr x0, x0, x2
-; nextln: lsl x4, x4, x3
-; nextln: asr x3, x1, x2
-; nextln: ands xzr, x2, #64
+; check:  lsr x3, x0, x2
+; nextln: asr x0, x1, x2
+; nextln: orn w4, wzr, w2
+; nextln: lsl x5, x1, #1
+; nextln: lsl x4, x5, x4
 ; nextln: asr x1, x1, #63
-; nextln: orr x0, x0, x4
-; nextln: csel x1, x1, x3, ne
-; nextln: csel x0, x3, x0, ne
+; nextln: orr x3, x3, x4
+; nextln: ands xzr, x2, #64
+; nextln: csel x1, x1, x0, ne
+; nextln: csel x0, x0, x3, ne
 ; nextln: ret

cranelift/filetests/filetests/isa/x64/i128.clif

@@ -917,10 +917,11 @@ block0(v0: i128, v1: i128):
 ; nextln: cmovzq  %rcx, %rax
 ; nextln: orq     %rdi, %rax
 ; nextln: testq   $$64, %rdx
+; nextln: movq    %rsi, %rdi
+; nextln: cmovzq  %rax, %rdi
 ; nextln: cmovzq  %rsi, %rcx
-; nextln: cmovzq  %rax, %rsi
 ; nextln: movq    %rcx, %rax
-; nextln: movq    %rsi, %rdx
+; nextln: movq    %rdi, %rdx
 ; nextln: movq    %rbp, %rsp
 ; nextln: popq    %rbp
 ; nextln: ret
@@ -946,13 +947,12 @@ block0(v0: i128, v1: i128):
 ; nextln: testq   $$127, %rdx
 ; nextln: cmovzq  %rcx, %rax
 ; nextln: orq     %rdi, %rax
-; nextln: xorq    %rcx, %rcx
+; nextln: xorq    %rdi, %rdi
 ; nextln: testq   $$64, %rdx
-; nextln: movq    %rsi, %rdi
-; nextln: cmovzq  %rax, %rdi
-; nextln: cmovzq  %rsi, %rcx
-; nextln: movq    %rdi, %rax
-; nextln: movq    %rcx, %rdx
+; nextln: cmovzq  %rsi, %rdi
+; nextln: cmovzq  %rax, %rsi
+; nextln: movq    %rsi, %rax
+; nextln: movq    %rdi, %rdx
 ; nextln: movq    %rbp, %rsp
 ; nextln: popq    %rbp
 ; nextln: ret
@@ -1000,24 +1000,24 @@ block0(v0: i128, v1: i128):
 
 ; check:  pushq   %rbp
 ; nextln: movq    %rsp, %rbp
-; nextln: movq    %rdi, %rax
+; nextln: movq    %rdi, %r9
+; nextln: movq    %rdx, %rcx
+; nextln: shlq    %cl, %r9
+; nextln: movq    %rsi, %rax
 ; nextln: movq    %rdx, %rcx
 ; nextln: shlq    %cl, %rax
-; nextln: movq    %rsi, %r8
-; nextln: movq    %rdx, %rcx
-; nextln: shlq    %cl, %r8
 ; nextln: movl    $$64, %ecx
 ; nextln: subq    %rdx, %rcx
-; nextln: movq    %rdi, %r9
-; nextln: shrq    %cl, %r9
-; nextln: xorq    %rcx, %rcx
+; nextln: movq    %rdi, %r10
+; nextln: shrq    %cl, %r10
+; nextln: xorq    %r8, %r8
 ; nextln: testq   $$127, %rdx
-; nextln: cmovzq  %rcx, %r9
-; nextln: orq     %r8, %r9
+; nextln: cmovzq  %r8, %r10
+; nextln: orq     %rax, %r10
 ; nextln: testq   $$64, %rdx
-; nextln: movq    %rcx, %r8
-; nextln: cmovzq  %rax, %r8
-; nextln: cmovzq  %r9, %rax
+; nextln: movq    %r9, %rax
+; nextln: cmovzq  %r10, %rax
+; nextln: cmovzq  %r9, %r8
 ; nextln: movl    $$128, %r9d
 ; nextln: subq    %rdx, %r9
 ; nextln: movq    %rdi, %rdx
@@ -1033,14 +1033,12 @@ block0(v0: i128, v1: i128):
 ; nextln: testq   $$127, %r9
 ; nextln: cmovzq  %rcx, %rsi
 ; nextln: orq     %rdx, %rsi
-; nextln: xorq    %rdx, %rdx
+; nextln: xorq    %rcx, %rcx
 ; nextln: testq   $$64, %r9
-; nextln: movq    %rdi, %rcx
-; nextln: cmovzq  %rsi, %rcx
-; nextln: movq    %rdx, %rsi
-; nextln: cmovzq  %rdi, %rsi
-; nextln: orq     %rcx, %r8
-; nextln: orq     %rsi, %rax
+; nextln: cmovzq  %rdi, %rcx
+; nextln: cmovzq  %rsi, %rdi
+; nextln: orq     %rdi, %r8
+; nextln: orq     %rcx, %rax
 ; nextln: movq    %rax, %rdx
 ; nextln: movq    %r8, %rax
 ; nextln: movq    %rbp, %rsp