Add the dyn keyword before trait objects;
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@@ -24,7 +24,7 @@ use crate::verifier::{VerifierErrors, VerifierStepResult};
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pub fn verify_flags(
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func: &ir::Function,
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cfg: &ControlFlowGraph,
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isa: Option<&isa::TargetIsa>,
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isa: Option<&dyn isa::TargetIsa>,
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errors: &mut VerifierErrors,
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) -> VerifierStepResult<()> {
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let _tt = timing::verify_flags();
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@@ -23,7 +23,7 @@ use core::cmp::Ordering;
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/// We don't verify that live ranges are minimal. This would require recomputing live ranges for
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/// all values.
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pub fn verify_liveness(
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isa: &TargetIsa,
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isa: &dyn TargetIsa,
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func: &Function,
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cfg: &ControlFlowGraph,
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liveness: &Liveness,
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@@ -42,7 +42,7 @@ pub fn verify_liveness(
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}
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struct LivenessVerifier<'a> {
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isa: &'a TargetIsa,
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isa: &'a dyn TargetIsa,
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func: &'a Function,
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cfg: &'a ControlFlowGraph,
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liveness: &'a Liveness,
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@@ -19,7 +19,7 @@ use crate::verifier::{VerifierErrors, VerifierStepResult};
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/// If a liveness analysis is provided, it is used to verify that there are no active register
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/// diversions across control flow edges.
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pub fn verify_locations(
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isa: &isa::TargetIsa,
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isa: &dyn isa::TargetIsa,
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func: &ir::Function,
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liveness: Option<&Liveness>,
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errors: &mut VerifierErrors,
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@@ -37,7 +37,7 @@ pub fn verify_locations(
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}
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struct LocationVerifier<'a> {
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isa: &'a isa::TargetIsa,
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isa: &'a dyn isa::TargetIsa,
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func: &'a ir::Function,
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reginfo: isa::RegInfo,
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encinfo: isa::EncInfo,
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@@ -266,7 +266,7 @@ struct Verifier<'a> {
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func: &'a Function,
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expected_cfg: ControlFlowGraph,
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expected_domtree: DominatorTree,
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isa: Option<&'a TargetIsa>,
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isa: Option<&'a dyn TargetIsa>,
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}
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impl<'a> Verifier<'a> {
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