x64: Mask shift amounts for small types (#4752)
* x64: Mask shift amounts for small types * cranelift: Disable i128 shifts in fuzzer again They are fixed. But we had a bunch of fuzzgen issues come in, and we don't want to accidentaly mark them as fixed * cranelift: Avoid masking shifts for 32 and 64 bit cases * cranelift: Add const shift tests and fix them * cranelift: Remove const `rotl` cases Now that `put_masked_in_imm8_gpr` works properly we can simplify rotl/rotr
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@@ -867,8 +867,8 @@ block0(v0: i8, v1: i128):
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; movq %rsi, %r9
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; movq %r9, %rcx
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; movq %rsi, %rcx
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; andq %rcx, $7, %rcx
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; shlb %cl, %dil, %dil
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; movq %rdi, %rax
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; movq %rbp, %rsp
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