Add the br_icmp instruction.

This instruction behaves like icmp fused with brnz, and it can be used
to represent fused compare+branch instruction on Intel when optimizing
for macro-op fusion.

RISC-V provides compare-and-branch instructions directly, and it is
needed there too.

lib/cretonne/meta/base/formats.py

@@ -43,6 +43,7 @@ FloatCompare = InstructionFormat(floatcc, VALUE, VALUE)
 
 Jump = InstructionFormat(ebb, VARIABLE_ARGS)
 Branch = InstructionFormat(VALUE, ebb, VARIABLE_ARGS)
+BranchIcmp = InstructionFormat(intcc, VALUE, VALUE, ebb, VARIABLE_ARGS)
 BranchTable = InstructionFormat(VALUE, jump_table)
 
 Call = InstructionFormat(