Add the br_icmp instruction.

This instruction behaves like icmp fused with brnz, and it can be used
to represent fused compare+branch instruction on Intel when optimizing
for macro-op fusion.

RISC-V provides compare-and-branch instructions directly, and it is
needed there too.

docs/langref.rst

@@ -321,6 +321,7 @@ instruction in the EBB.
 .. autoinst:: jump
 .. autoinst:: brz
 .. autoinst:: brnz
+.. autoinst:: br_icmp
 .. autoinst:: br_table
 
 .. inst:: JT = jump_table EBB0, EBB1, ..., EBBn