Add an EncRecipe meta-language class.

Move the CPUMode reference from EncRecipe to the Encoding itself, allowing
EncRecipes to be shared between CPU modes. At least RISC-V should be able to
share some recipes between RV32 and RV64 modes.
This commit is contained in:
Jakob Stoklund Olesen
2016-08-03 12:06:21 -07:00
parent c4faef196e
commit d215b622e4
2 changed files with 21 additions and 3 deletions

View File

@@ -251,17 +251,17 @@ specifying instruction encodings:
.. digraph:: encoding .. digraph:: encoding
node [shape=record] node [shape=record]
CPUMode -> Target
EncRecipe -> CPUMode
EncRecipe -> SubtargetPred EncRecipe -> SubtargetPred
EncRecipe -> InstrFormat EncRecipe -> InstrFormat
EncRecipe -> InstrPred EncRecipe -> InstrPred
Encoding [label="{Encoding|Opcode+TypeVars}"] Encoding [label="{Encoding|Opcode+TypeVars}"]
Encoding -> EncRecipe [label="+EncBits"] Encoding -> EncRecipe [label="+EncBits"]
Encoding -> CPUMode
Encoding -> SubtargetPred Encoding -> SubtargetPred
Encoding -> InstrPred Encoding -> InstrPred
Encoding -> Opcode Encoding -> Opcode
Opcode -> InstrFormat Opcode -> InstrFormat
CPUMode -> Target
An :py:class:`Encoding` instance specifies the encoding of a concrete An :py:class:`Encoding` instance specifies the encoding of a concrete
instruction. The following properties are used to select instructions to be instruction. The following properties are used to select instructions to be
@@ -273,6 +273,7 @@ encoded:
instruction. instruction.
- An :term:`instruction predicate` that must be satisfied by the instruction's - An :term:`instruction predicate` that must be satisfied by the instruction's
immediate operands. immediate operands.
- The CPU mode that must be active.
- A :term:`sub-target predicate` that must be satisfied by the currently active - A :term:`sub-target predicate` that must be satisfied by the currently active
sub-target. sub-target.
- :term:`Register constraint`\s that must be satisfied by the instruction's value - :term:`Register constraint`\s that must be satisfied by the instruction's value
@@ -282,7 +283,6 @@ An encoding specifies an *encoding recipe* along with some *encoding bits* that
the recipe can use for native opcode fields etc. The encoding recipe has the recipe can use for native opcode fields etc. The encoding recipe has
additional constraints that must be satisfied: additional constraints that must be satisfied:
- The CPU mode that must be active to enable encodings.
- An :py:class:`InstructionFormat` that must match the format required by the - An :py:class:`InstructionFormat` that must match the format required by the
opcodes of any encodings that use this recipe. opcodes of any encodings that use this recipe.
- An additional :term:`instruction predicate`. - An additional :term:`instruction predicate`.
@@ -292,6 +292,8 @@ The additional predicates in the :py:class:`EncRecipe` are merged with the
per-encoding predicates when generating the encoding matcher code. Often per-encoding predicates when generating the encoding matcher code. Often
encodings only need the recipe predicates. encodings only need the recipe predicates.
.. autoclass:: EncRecipe
Targets Targets
======= =======

View File

@@ -673,6 +673,22 @@ class CPUMode(object):
self.target = target self.target = target
class EncRecipe(object):
"""
A recipe for encoding instructions with a given format.
Many different instructions can be encoded by the same recipe, but they
must all have the same instruction format.
:param name: Short mnemonic name for this recipe.
:param format: All encoded instructions must have this
:py:class:`InstructionFormat`.
"""
def __init__(self, name, format):
self.name = name
self.format = format
# Import the fixed instruction formats now so they can be added to the # Import the fixed instruction formats now so they can be added to the
# registry. # registry.
importlib.import_module('cretonne.formats') importlib.import_module('cretonne.formats')