Baldrdash: use the right frame offset when loading arguments from the stack
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@@ -299,6 +299,11 @@ impl<I: VCodeInst> VCode<I> {
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}
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}
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/// Returns the flags controlling this function's compilation.
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pub fn flags(&self) -> &settings::Flags {
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self.abi.flags()
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}
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/// Get the IR-level type of a VReg.
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pub fn vreg_type(&self, vreg: VirtualReg) -> Type {
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self.vreg_types[vreg.get_index()]
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@@ -329,11 +334,7 @@ impl<I: VCodeInst> VCode<I> {
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/// Take the results of register allocation, with a sequence of
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/// instructions including spliced fill/reload/move instructions, and replace
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/// the VCode with them.
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pub fn replace_insns_from_regalloc(
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&mut self,
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result: RegAllocResult<Self>,
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flags: &settings::Flags,
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) {
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pub fn replace_insns_from_regalloc(&mut self, result: RegAllocResult<Self>) {
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self.final_block_order = compute_final_block_order(self);
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// Record the spillslot count and clobbered registers for the ABI/stack
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@@ -355,7 +356,7 @@ impl<I: VCodeInst> VCode<I> {
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if *block == self.entry {
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// Start with the prologue.
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final_insns.extend(self.abi.gen_prologue(flags).into_iter());
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final_insns.extend(self.abi.gen_prologue().into_iter());
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}
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for i in start..end {
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@@ -371,7 +372,7 @@ impl<I: VCodeInst> VCode<I> {
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// with the epilogue.
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let is_ret = insn.is_term() == MachTerminator::Ret;
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if is_ret {
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final_insns.extend(self.abi.gen_epilogue(flags).into_iter());
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final_insns.extend(self.abi.gen_epilogue().into_iter());
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} else {
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final_insns.push(insn.clone());
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}
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