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Avoid infer_rex() and w() on the same x86 encoding template, resolves #1342

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In cranelift x86 encodings, it seemed unintuitive to specialize Templates with both `infer_rex()`` and `w()`: if `w()` is specified, the REX.W bit must be set so a REX prefix is alway required--no need to infer it. This change forces us to write `rex().w()``--it's more explicit and shows more clearly what cranelift will emit. This change also modifies the tests that expected DynRex recipes.
This commit is contained in:
Andrew Brown
2020-03-31 08:43:17 -07:00
parent a325b62ade
commit d0daef6f60
6 changed files with 18 additions and 17 deletions
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8
cranelift/filetests/filetests/postopt/complex_memory_ops.clif
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@@ -3,7 +3,7 @@ target x86_64
function %dual_loads(i64, i64) -> i64 {
block0(v0: i64, v1: i64):
[DynRexOp1rr#8001] v3 = iadd v0, v1
[RexOp1rr#8001] v3 = iadd v0, v1
v4 = load.i64 v3
v5 = uload8.i64 v3
v6 = sload8.i64 v3
@@ -29,7 +29,7 @@ block0(v0: i64, v1: i64):
function %dual_loads2(i64, i64) -> i64 {
block0(v0: i64, v1: i64):
[DynRexOp1rr#8001] v3 = iadd v0, v1
[RexOp1rr#8001] v3 = iadd v0, v1
v4 = load.i64 v3+1
v5 = uload8.i64 v3+1
v6 = sload8.i64 v3+1
@@ -55,7 +55,7 @@ block0(v0: i64, v1: i64):
function %dual_stores(i64, i64, i64) {
block0(v0: i64, v1: i64, v2: i64):
[DynRexOp1rr#8001] v3 = iadd v0, v1
[RexOp1rr#8001] v3 = iadd v0, v1
[RexOp1st#8089] store.i64 v2, v3
[RexOp1st#88] istore8.i64 v2, v3
[RexMp1st#189] istore16.i64 v2, v3
@@ -75,7 +75,7 @@ block0(v0: i64, v1: i64, v2: i64):
function %dual_stores2(i64, i64, i64) {
block0(v0: i64, v1: i64, v2: i64):
[DynRexOp1rr#8001] v3 = iadd v0, v1
[RexOp1rr#8001] v3 = iadd v0, v1
[RexOp1stDisp8#8089] store.i64 v2, v3+1
[RexOp1stDisp8#88] istore8.i64 v2, v3+1
[RexMp1stDisp8#189] istore16.i64 v2, v3+1