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Avoid infer_rex() and w() on the same x86 encoding template, resolves #1342

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In cranelift x86 encodings, it seemed unintuitive to specialize Templates with both `infer_rex()`` and `w()`: if `w()` is specified, the REX.W bit must be set so a REX prefix is alway required--no need to infer it. This change forces us to write `rex().w()``--it's more explicit and shows more clearly what cranelift will emit. This change also modifies the tests that expected DynRex recipes.
This commit is contained in:
Andrew Brown
2020-03-31 08:43:17 -07:00
parent a325b62ade
commit d0daef6f60
6 changed files with 18 additions and 17 deletions
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4
cranelift/filetests/filetests/isa/x86/legalize-br-icmp.clif
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@@ -15,7 +15,7 @@ block1:
; sameln: function %br_icmp(i64 [%rdi]) fast {
; nextln: block0(v0: i64):
; nextln: [RexOp1pu_id#b8] v1 = iconst.i64 0
; nextln: [DynRexOp1icscc#8039] v2 = icmp eq v0, v1
; nextln: [RexOp1icscc#8039] v2 = icmp eq v0, v1
; nextln: [RexOp1t8jccb#75] brnz v2, block1
; nextln: [Op1jmpb#eb] jump block1
; nextln:
@@ -37,7 +37,7 @@ block1(v2: i64):
; sameln: function %br_icmp_args(i64 [%rdi]) fast {
; nextln: block0(v0: i64):
; nextln: [RexOp1pu_id#b8] v1 = iconst.i64 0
; nextln: [DynRexOp1icscc#8039] v3 = icmp eq v0, v1
; nextln: [RexOp1icscc#8039] v3 = icmp eq v0, v1
; nextln: [RexOp1t8jccb#75] brnz v3, block1(v0)
; nextln: [Op1jmpb#eb] jump block1(v0)
; nextln:

2
cranelift/filetests/filetests/isa/x86/relax_branch.clif
View File

@@ -22,7 +22,7 @@ function u0:2691(i32 [%rdi], i32 [%rsi], i64 vmctx [%r14]) -> i64 uext [%rax] ba
block3(v8: i32 [%rdi], v19: i32 [%rsi]):
@0005 [RexOp1ldDisp8#808b,%rax] v7 = load.i64 v2+48
@0005 [DynRexOp1rcmp_ib#f083,%rflags] v91 = ifcmp_imm v7, 0
@0005 [RexOp1rcmp_ib#f083,%rflags] v91 = ifcmp_imm v7, 0
@0005 [trapif#00] trapif ne v91, interrupt
[DynRexOp1umr#89,%rax] v105 = copy v8
@000b [DynRexOp1r_ib#83,%rax] v10 = iadd_imm v105, 1