We now parse and record a ValueLoc for each SSA value result of each instruction. Code currently not passing tests.

This commit is contained in:
Angus Holder
2017-03-09 02:45:20 +00:00
committed by Jakob Stoklund Olesen
parent bc1901b766
commit cfdecfdcbf
2 changed files with 57 additions and 19 deletions

View File

@@ -15,11 +15,10 @@ ebb1(v0: i32, v1: i32):
}
; sameln: function foo(i32, i32) {
; nextln: $ebb1($v0: i32, $v1: i32):
; nextln: [-]$WS $v2 = iadd $v0, $v1
; nextln: [-,-]$WS $v2 = iadd $v0, $v1
; nextln: [-]$WS trap
; nextln: [R#1234]$WS $v6, $v7 = iadd_cout $v2, $v0
; TODO Add the full encoding information available: instruction recipe name and architectural registers if specified
; nextln: [Rshamt#beef]$WS $v8 = ishl_imm $v6, 2
; nextln: [-]$WS $v9 = iadd $v8, $v7
; nextln: [R#1234,%x5,%x11]$WS $v6, $v7 = iadd_cout $v2, $v0
; nextln: [Rshamt#beef,%x25]$WS $v8 = ishl_imm $v6, 2
; nextln: [-,-]$WS $v9 = iadd $v8, $v7
; nextln: [Iret#05]$WS return $v0, $v8
; nextln: }