Add a DynRex recipe type for x86, decreasing the number of recipes (#1298)

This patch adds a third mode for templates: REX inference is requestable
at template instantiation time. This reduces the number of recipes
by removing rex()/nonrex() redundancy for many instructions.
This commit is contained in:
Sean Stangl
2019-12-19 15:49:34 -07:00
committed by GitHub
parent b486289ab8
commit cf9e762f16
13 changed files with 875 additions and 514 deletions

View File

@@ -5,9 +5,9 @@ target i686
function %br_icmp(i32, i32) -> i32 {
ebb0(v0: i32, v1: i32):
[Op1icscc#39,%rdx] v2 = icmp slt v0, v1
[Op1t8jccd_long#85] brnz v2, ebb1
[Op1jmpb#eb] jump ebb2
[DynRexOp1icscc#39,%rdx] v2 = icmp slt v0, v1
[Op1t8jccd_long#85] brnz v2, ebb1
[Op1jmpb#eb] jump ebb2
ebb2:
[Op1ret#c3] return v1
@@ -35,9 +35,9 @@ ebb1:
function %br_icmp_inverse(i32, i32) -> i32 {
ebb0(v0: i32, v1: i32):
[Op1icscc#39,%rdx] v2 = icmp slt v0, v1
[Op1t8jccd_long#84] brz v2, ebb1
[Op1jmpb#eb] jump ebb2
[DynRexOp1icscc#39,%rdx] v2 = icmp slt v0, v1
[Op1t8jccd_long#84] brz v2, ebb1
[Op1jmpb#eb] jump ebb2
ebb2:
[Op1ret#c3] return v1
@@ -65,9 +65,9 @@ ebb1:
function %br_icmp_imm(i32, i32) -> i32 {
ebb0(v0: i32, v1: i32):
[Op1icscc_ib#7083] v2 = icmp_imm slt v0, 2
[Op1t8jccd_long#84] brz v2, ebb1
[Op1jmpb#eb] jump ebb2
[DynRexOp1icscc_ib#7083] v2 = icmp_imm slt v0, 2
[Op1t8jccd_long#84] brz v2, ebb1
[Op1jmpb#eb] jump ebb2
ebb2:
[Op1ret#c3] return v1

View File

@@ -3,7 +3,7 @@ target x86_64
function %dual_loads(i64, i64) -> i64 {
ebb0(v0: i64, v1: i64):
[RexOp1rr#8001] v3 = iadd v0, v1
[DynRexOp1rr#8001] v3 = iadd v0, v1
v4 = load.i64 v3
v5 = uload8.i64 v3
v6 = sload8.i64 v3
@@ -29,7 +29,7 @@ ebb0(v0: i64, v1: i64):
function %dual_loads2(i64, i64) -> i64 {
ebb0(v0: i64, v1: i64):
[RexOp1rr#8001] v3 = iadd v0, v1
[DynRexOp1rr#8001] v3 = iadd v0, v1
v4 = load.i64 v3+1
v5 = uload8.i64 v3+1
v6 = sload8.i64 v3+1
@@ -55,7 +55,7 @@ ebb0(v0: i64, v1: i64):
function %dual_stores(i64, i64, i64) {
ebb0(v0: i64, v1: i64, v2: i64):
[RexOp1rr#8001] v3 = iadd v0, v1
[DynRexOp1rr#8001] v3 = iadd v0, v1
[RexOp1st#8089] store.i64 v2, v3
[RexOp1st#88] istore8.i64 v2, v3
[RexMp1st#189] istore16.i64 v2, v3
@@ -75,7 +75,7 @@ ebb0(v0: i64, v1: i64, v2: i64):
function %dual_stores2(i64, i64, i64) {
ebb0(v0: i64, v1: i64, v2: i64):
[RexOp1rr#8001] v3 = iadd v0, v1
[DynRexOp1rr#8001] v3 = iadd v0, v1
[RexOp1stDisp8#8089] store.i64 v2, v3+1
[RexOp1stDisp8#88] istore8.i64 v2, v3+1
[RexMp1stDisp8#189] istore16.i64 v2, v3+1