add riscv64 backend for cranelift. (#4271)

Add a RISC-V 64 (`riscv64`, RV64GC) backend.

Co-authored-by: yuyang <756445638@qq.com>
Co-authored-by: Chris Fallin <chris@cfallin.org>
Co-authored-by: Afonso Bordado <afonsobordado@az8.co>

crates/runtime/src/traphandlers/backtrace.rs

@@ -42,6 +42,9 @@ cfg_if! {
     } else if #[cfg(target_arch = "s390x")] {
         mod s390x;
         use s390x as arch;
+    } else if #[cfg(target_arch = "riscv64")] {
+        mod riscv64;
+        use riscv64 as arch;
     } else {
         compile_error!("unsupported architecture");
     }

crates/runtime/src/traphandlers/backtrace/riscv64.rs

@@ -0,0 +1,21 @@
+//
+pub unsafe fn get_next_older_pc_from_fp(fp: usize) -> usize {
+    *(fp as *mut usize).offset(1)
+}
+
+// And the current frame pointer points to the next older frame pointer.
+pub const NEXT_OLDER_FP_FROM_FP_OFFSET: usize = 0;
+
+pub fn reached_entry_sp(fp: usize, first_wasm_sp: usize) -> bool {
+    // Calls in riscv64 push two i64s (old FP and return PC) so our entry SP is
+    // two i64s above the first Wasm FP.
+    fp == first_wasm_sp - 16
+}
+
+pub fn assert_entry_sp_is_aligned(sp: usize) {
+    assert_eq!(sp % 16, 0, "stack should always be aligned to 16");
+}
+
+pub fn assert_fp_is_aligned(fp: usize) {
+    assert_eq!(fp % 16, 0, "stack should always be aligned to 16");
+}

crates/runtime/src/traphandlers/unix.rs

@@ -228,7 +228,14 @@ unsafe fn get_pc_and_fp(cx: *mut libc::c_void, _signum: libc::c_int) -> (*const
                 cx.uc_mcontext.mc_rip as *const u8,
                 cx.uc_mcontext.mc_rbp as usize,
             )
-        } else {
+        } else if #[cfg(all(target_os = "linux", target_arch = "riscv64"))] {
+            let cx = &*(cx as *const libc::ucontext_t);
+            (
+                cx.uc_mcontext.__gregs[libc::REG_PC] as *const u8,
+                cx.uc_mcontext.__gregs[libc::REG_S0] as usize,
+            )
+        }
+        else {
             compile_error!("unsupported platform");
         }
     }