add riscv64 backend for cranelift. (#4271)

Add a RISC-V 64 (`riscv64`, RV64GC) backend.

Co-authored-by: yuyang <756445638@qq.com>
Co-authored-by: Chris Fallin <chris@cfallin.org>
Co-authored-by: Afonso Bordado <afonsobordado@az8.co>

cranelift/filetests/filetests/runtests/br_table.clif

@@ -4,6 +4,7 @@ target aarch64
 target aarch64 use_bti
 target x86_64
 target s390x
+target riscv64
 
 function %br_table_i32(i32) -> i32 {
   jt0 = jump_table [block1, block2, block2, block3]
@@ -38,4 +39,4 @@ block5(v5: i32):
 ; run: %br_table_i32(4) == 8
 ; run: %br_table_i32(5) == 9
 ; run: %br_table_i32(6) == 10
-; run: %br_table_i32(-1) == 3
+; run: %br_table_i32(-1) == 3